Re: [PATCH v5 00/11] phy: qualcomm: qmp-combo: update DP PHY PLL programming on Glymur

[Luke Macken]

Tested on a Lenovo ThinkPad T14s Gen 7 (Mahua / Snapdragon X2 Elite, which
uses the qcom,glymur-qmp-usb3-dp-phy compatible) with linux-next
next-20261013 plus this series: external DisplayPort over USB-C works,
Dell U3818DW at 3840x1600@60 over HBR2 x4, and the internal eDP panel keeps
working.

Tested-by: Luke Macken <luke@xxxxxxxxxx>

One data point in case it is useful: without the series, link training on
this machine already succeeds at HBR2 x4, DPCD 0x202-0x205 read 77 77 01 01
and the symbol error counters stay at zero, but no picture is produced. The
DPU interface frame counter runs at 30 fps for the 60 Hz mode and the sink's
TEST_CRC count stays at zero, which is consistent with the DP pixel clock
running at half the requested rate. With the series the frame counter runs
at 60 fps and the sink returns a CRC, with the unchanged 5400000000 / 4 in
qmp_v8_configure_dp_clocks(). The same half-rate symptom was also seen
without the series at 2 lanes.