Re: [PATCH 1/4] dt-bindings: cache: qcom,llcc: allow optional second interrupt for LCP/SRP ECC
From: Krzysztof Kozlowski
Date: Sat Oct 17 2026 - 12:35:31 EST
On Wed, Oct 14, 2026 at 09:26:16PM +0530, Faiyaz Mohammed wrote:
> QCM2390 (Shikra) has an LCP/SRP block that signals DDR DRAM ECC errors
> on a dedicated interrupt line separate from the existing TRP/DRP cache
> ECC interrupt.
>
> Allow an optional second interrupt in the LLCC binding, add
> interrupt-names with "llcc-ecc" and "llcc-lcp-ecc", and enforce both
> are present when compatible is qcom,shikra-llcc.
>
> Signed-off-by: Faiyaz Mohammed <faiyaz.mohammed@xxxxxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/cache/qcom,llcc.yaml | 26 +++++++++++++++++++++-
> 1 file changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> index 2141e5d4de63..3546cf7c2519 100644
> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> @@ -64,7 +64,17 @@ properties:
> maxItems: 18
>
> interrupts:
> - maxItems: 1
> + minItems: 1
> + items:
> + - description: TRP/DRP LLCC cache ECC (ddrss_apps_interrupt[2])
> + - description: LCP/SRP DDR DRAM ECC (ddrss_apps_interrupt[1]), present
> + on platforms with an LCP/SRP block such as QCM2390
> +
> + interrupt-names:
> + minItems: 1
> + items:
> + - const: llcc-ecc
ecc
> + - const: llcc-lcp-ecc
lcp
>
> memory-region:
> maxItems: 1
> @@ -234,6 +244,20 @@ allOf:
> - const: llcc1_base
> - const: llcc_broadcast_base
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,shikra-llcc
> + then:
> + properties:
> + interrupts:
> + minItems: 2
> + interrupt-names:
> + minItems: 2
> + required:
> + - interrupt-names
Please address other comments/emails.
Best regards,
Krzysztof