Re: [PATCH 08/10] iio: frequency: ad9910: support iio backend

[Jonathan Cameron]

On Thu, 15 Oct 2026 13:49:48 -0300
Rodrigo Alencar via B4 Relay <devnull+rodrigo.alencar.analog.com@xxxxxxxxxx> wrote:

> From: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>
> 
> The AD9910 parallel data port allows modulation of the DDS core parameters
> at up to the PDCLK rate, which requires a high-speed data source. Add
> support for an optional IIO backend that provides such interface, with
> data streamed into the device through an output buffer.
> 
> The parallel port channels get scan indexes and scan types according to
> the data destination: 14-bit amplitude, 16-bit phase, 16-bit frequency,
> or the 8-bit amplitude and phase pair for polar modulation. As only one
> destination can be active at a time, this is enforced by the available
> scan masks. On buffer enable, the destination is configured in the
> backend and the parallel data port is enabled. The sampling_frequency
> attribute of the parallel port channels controls the backend data rate.
> 
> The backend is also notified about profile changes, as it may drive the
> PROFILE[2:0] pins, and the debugfs source attributes now consider the
> parallel data port when reporting which channel controls each DDS core
> parameter.
> 
> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>


> diff --git a/drivers/iio/frequency/ad9910.c b/drivers/iio/frequency/ad9910.c
> index 3d517879dee3..39d65dafd5a1 100644
> --- a/drivers/iio/frequency/ad9910.c
> +++ b/drivers/iio/frequency/ad9910.c



> @@ -1075,7 +1122,15 @@ static const struct iio_chan_spec ad9910_channels[] = {
>  		.output = 1,
>  		.channel = AD9910_CHANNEL_PARALLEL_POLAR,
>  		.address = AD9910_CHAN_IDX_PARALLEL_POLAR_AMP,
> -		.info_mask_separate = BIT(IIO_CHAN_INFO_OFFSET) |
> +		.scan_index = AD9910_SCAN_IDX_POLAR_AMP,
> +		.scan_type = {
> +			.sign = 'u',
> +			.realbits = 8,
> +			.storagebits = 8,
> +			.shift = 0,

Really small thing but we tend to drop setting shift when it takes
the default of 0.  Particularly makes sense here given no room to
shift with 8 bits in 8 bits.

> +		},
> +		.info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> +				      BIT(IIO_CHAN_INFO_OFFSET) |
>  				      BIT(IIO_CHAN_INFO_SCALE),
>  		.parent = &ad9910_channels[AD9910_CHAN_IDX_PHY],
>  	},
> @@ -1085,7 +1140,15 @@ static const struct iio_chan_spec ad9910_channels[] = {
>  		.output = 1,
>  		.channel = AD9910_CHANNEL_PARALLEL_POLAR,
>  		.address = AD9910_CHAN_IDX_PARALLEL_POLAR_PHASE,
> -		.info_mask_separate = BIT(IIO_CHAN_INFO_OFFSET) |
> +		.scan_index = AD9910_SCAN_IDX_POLAR_PHASE,
> +		.scan_type = {
> +			.sign = 'u',
> +			.realbits = 8,
> +			.storagebits = 8,
> +			.shift = 0,
> +		},
> +		.info_mask_separate = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> +				      BIT(IIO_CHAN_INFO_OFFSET) |
>  				      BIT(IIO_CHAN_INFO_SCALE),
>  		.parent = &ad9910_channels[AD9910_CHAN_IDX_PHY],
>  	},