Re: [PATCH] PCI: spacemit: Ignore link partner PERST on K1
From: Manivannan Sadhasivam
Date: Sun Oct 18 2026 - 00:27:43 EST
On 2026-09-24 10:04 +0800, Encrow Thorne wrote:
> The K1 PCIe controller and PHY are affected by the PERST signal from
> the link partner during initialization. With some devices connected,
> this can prevent host initialization from progressing and cause the
> system to hang while probing the PCIe controller.
>
> Set PCIE_IGNORE_PERSTN before accessing the DBI registers. When set,
> this bit makes both the PCIe controller and PHY ignore the PERST
> signal from the link partner.
>
> This allows host initialization to complete without being affected by
> the link partner's PERST state.
>
> Signed-off-by: Encrow Thorne <encrow.thorne@xxxxxxxxxxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pcie-spacemit-k1.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-spacemit-k1.c b/drivers/pci/controller/dwc/pcie-spacemit-k1.c
> index 0564c46e2f48..98f067e1ba81 100644
> --- a/drivers/pci/controller/dwc/pcie-spacemit-k1.c
> +++ b/drivers/pci/controller/dwc/pcie-spacemit-k1.c
> @@ -44,6 +44,7 @@
>
> #define PCIE_CONTROL_LOGIC 0x0004
> #define PCIE_SOFT_RESET BIT(0)
> +#define PCIE_IGNORE_PERSTN BIT(2)
>
> struct k1_pcie {
> struct dw_pcie pci;
> @@ -137,6 +138,13 @@ static int k1_pcie_init(struct dw_pcie_rp *pp)
> if (ret)
> return ret;
>
> + /*
> + * When set to 1, the PCIe controller and PHY ignore the PERST signal
> + * from the link partner in both RC and EP modes.
> + */
What? PERST# is an output signal to RC and input to Endpoint. PERST# is not
controlled by the Endpoint, but only by the RC/host.
- Mani