Re: [PATCH 1/3] dt-bindings: iio: adc: add bindings for stm32 mdf filter

[Jonathan Cameron]

> >> Yes, we can have two clocks gated independently but sharing the same rate.
> >>
> >> Using the clock framework apis seemed to me the right way to manage cck1 and
> >> cck0 gating and divider computing. I think I would have to introduce
> >> proprietary properties and have to implement code in the driver, that would
> >> be handled natively by the framework otherwise.  
> > 
> > The CCF is still the right way to do it, especially since CCK0/1 can be
> > exported to other devices. I don't believe you need to actually have a
> > reference in DT to do this though, plenty of "real" clock controllers
> > have only one input clock and hang a whole tree with multiple layers off
> > that.
> > Down below I mentioned this under "ouroboros devices", I think this kind
> > of ability to chose which clock a channel uses is a fairly normal thing
> > to do in IIO land, I just dunno what the preferred mechanism is - I just
> > know that it is not referencing yourself (probably it's some sort of
> > property that you put in a channel node that says 'blah-clock = "cck0"',
> > but better that the IIO folks answer.
> >   
> 
> The adc.yaml binding do not expose clock properties. But maybe IIO 
> experts can answer about this.

Hmm.. For an 'conventional' ADC channel a clock is a novel thing to have
on a per channel basis. What does it mean for an analog signal?
I think these are signals between the front end (which here typically
has one channel only) and the backend. They are useful because they
end up indicating (I think) whether we want to interleave or not?

Anyhow, right now I don't have this clear enough in my head to
give a firm answer.

Jonathan