[PATCH v7 00/14] PCI: rzg3s-host: Add PCIe hotplug support

[Claudiu Beznea]

From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>

Hi,

Series adds hotplug support for the rzg3s-host driver. This is a
continuation of the series John posted initially at [1]. Along with it,
prerequisites fixes and cleanup patches were added.

Series was tested on RZ/G3S and RZ/G3E boards by generating consecutive
link down/up events. The RZ/G3S has an I2C device which, depending on
the way it is programmed, it controls the state of the PCIe link. The
board has 3 PCIe interface: PCIE_SLOT, M.2 Key E, M.2 Key B. The
following script was executed for ~9 hours:

#!/bin/sh

echo performance > /sys/module/pcie_aspm/parameters/policy

while :; do
        i2cset -y 1 0x18 0xf4 0x8 # Link down
        i2cset -y 1 0x18 0xf4 0xc # Link up: PCIE_SLOT (NVMe Micron)
        i2cset -y 1 0x18 0xf4 0x8 # Link down
        i2cset -y 1 0x18 0xf4 0xd # Link up: M.2 Key B (NVMe Transcend)
        i2cset -y 1 0x18 0xf4 0x8 # Link down
        i2cset -y 1 0x18 0xf4 0xb # Link up: M.2 Key E (WiFi AX200)
done

Thank you,
Claudiu

Changes in v7:
- added the following fixes patches:
-- PCI: rzg3s-host: Don't mix goto-based unwinding and cleanup helpers
-- PCI: rzg3s-host: Create the INTx IRQ domain before setting the chained
   handlers
-- PCI: rzg3s-host: Initialize the IRQ domains after the IRQs are masked
-- PCI: rzg3s-host: Drop read-modify-write approach for the R/W1C
   registers
-- PCI: rzg3s-host: Use cached MSI address in .irq_compose_msi_msg()

- addressed sashiko comments:
-- do not mix goto and __free() cleanup constructs
-- addressed concurrency: b/w different paths calling .reset_root_port()
   and b/w IRQ subsystems and .reset_root_port()

Changes in v6:
- addressed review comments as follows:
- added patch 7/9 ("PCI: rzg3s-host: Add helper to wait for link up")
- adopted the approach from pciehp and saved DSN of the connected
  device and, based on it, take decision if the bus devices need to be
  removed + rescanned
- in case of link up and !list_empty(&bus->devices) remove first the
  devices from the bus and re-scan (adopted the approach from pciehp)
- with the new approach cleared the link IRQ (before enabling it) in
  probe, and resume paths

Changes in v5:
- collected tags
- added patch 3/9 ("PCI: rzg3s-host: Select PCI_HOST_COMMON")
- addressed sashiko review comments (detailed in individual patches)

Changes in v4:
- simplified comments in patch 2/8
- kept only DL_UpDown changes in patch 7/8
- added patch 8/8 for the .reset_root_port() support

Changes in v3:
- added patches 1-6
- re-worked patch 7 to use struct pci_host_bridge::reset_root_port() API

[1] https://lore.kernel.org/all/20260630141720.3938514-1-john.madieu.xa@xxxxxxxxxxxxxx/


Claudiu Beznea (13):
  PCI: rzg3s-host: Follow hardware manual clock/reset initialization
    order
  PCI: rzg3s-host: Fix runtime PM handling in the NOIRQ suspend/resume
    phase
  PCI: rzg3s-host: Don't mix goto-based unwinding and cleanup helpers
  PCI: rzg3s-host: Create the INTx IRQ domain before setting the chained
    handlers
  PCI: rzg3s-host: Initialize the IRQ domains after the IRQs are masked
  PCI: rzg3s-host: Drop read-modify-write approach for the R/W1C
    registers
  PCI: rzg3s-host: Use cached MSI address in .irq_compose_msi_msg()
  PCI: rzg3s-host: Drop nop instructions
  PCI: rzg3s-host: Move host configuration code together
  PCI: rzg3s-host: Move suspend/resume code into dedicated functions
  PCI: rzg3s-host: Move IRQ domain setup code
  PCI: rzg3s-host: Add helper to wait for link up
  PCI: rzg3s-host: Add bridge::reset_root_port()

John Madieu (1):
  PCI: rzg3s-host: Re-enumerate the bus on PCIe link-state changes

 drivers/pci/controller/Kconfig           |    1 +
 drivers/pci/controller/pcie-rzg3s-host.c | 1260 +++++++++++++++-------
 2 files changed, 851 insertions(+), 410 deletions(-)

-- 
2.43.0