RE: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC

[Biju Das]

Hi Claudiu,

> -----Original Message-----
> From: Claudiu Beznea <claudiu.beznea@xxxxxxxxx>
> Sent: 19 October 2026 09:02
> Subject: Re: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC
> 
> Hi, Biju,
> 
> On 10/19/26 10:24, Biju Das wrote:
> > Hi Claudiu,
> >
> >> -----Original Message-----
> >> From: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
> >> Sent: 16 October 2026 14:34
> >> Subject: Re: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd:
> >> Document RZ/G3S SoC
> >>
> >> On 02.09.2026 17:15:38, Claudiu Beznea wrote:
> >>> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> >>>
> >>> The CAN FD controller found on the Renesas RZ/G3S SoC is largely
> >>> compatible with the variant present on the RZ/G3E SoC. The main differences are:
> >>> - the RZ/G3S provides only two CAN FD channels
> >>> - the RZ/G3S supports only CAN FD operation; the Channel n CAN FD
> >>>    Configuration Register does not implement the bits used to select
> >>>    classical CAN-only mode (bit 30) or CAN FD-only mode (bit 28);
> >>>    consequently, bit 31 (CAN FD Frame Distinction Enable) of the same
> >>>    register is also not implemented
> >>> - some bits in several registers (mainly reserved or status bits) are
> >>>    read-write on the RZ/G3S but read-only on the RZ/G3E; their behavior is
> >>>    otherwise identical: the bits read back as 0 on both SoCs and software
> >>>    is allowed to write only 0 to them on the RZ/G3S
> >>> - the RZ/G3S provides 256 acceptance filters, compared to 768 on the
> >>>    RZ/G3E
> >>> - the RZ/G3S can use PCLK clock as the CAN FD clock source through an
> >>>    internal clock divider, while also supporting an external CAN FD clock
> >>>    source
> >>>
> >>> Since:
> >>> - the SoC clock generator provides to the CAN IP only the peripheral and
> >>>    the RAM clocks
> >>> - when sourced from the peripheral clock, the CAN-FD clock is obtained
> >>>    inside the IP itself by dividing the peripheral clock
> >>> - the assigned-clocks and assigned-clock-rates properties are specific to
> >>>    the CAN-FD clock
> >>> the assigned-clocks and assigned-clock-rates properties were dropped
> >>> from the required properties list of the Renesas RZ/G3S SoC.
> >>>
> >>> Add documentation for the Renesas RZ/G3S SoC.
> >>>
> >>> Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
> >>> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> >>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> >>
> >> the netdev review bot has found a nitpick, it's about the comment in
> >> "rcar_canfd.c". Can you fix it, if you re-spin the series.
> >>
> >> regards,
> >> Marc
> >>
> >> pw-bot: cr
> >>
> >> --- Patch [11]: [PATCH net-next 11/37] dt-bindings: can:
> >> renesas,rcar-canfd: Document RZ/G3S SoC --- commit
> >> 69b4e37d18e5229e1c800b45a5df061af8a98eb9
> >> Author: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
> >>
> >> dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC
> >>
> >> This adds the renesas,r9a08g045-canfd compatible for the RZ/G3S CAN
> >> FD controller. It adds the compatible to the existing conditional
> >> blocks. It also forbids renesas,no-can-fd and renesas,fd-only on RZ/G3S, and makes assigned-clocks and
> assigned-clock-rates required only for the other SoCs.
> >>
> >> Link:
> >> https://patch.msgid.link/20260902141544.565763-2-claudiu.beznea+renes
> >> as@xxxxxxxxx
> >>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
> >>> b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
> >>> index b9d9dd7a7967..bbaaef8f4282 100644
> >>> ---
> >>> a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
> >>> +++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.y
> >>> +++ am
> >>> +++ l
> >>
> >> [ ... ]
> >>
> >>> @@ -350,6 +352,20 @@ allOf:
> >>>         properties:
> >>>           reset-names: false
> >>>
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            const: renesas,r9a08g045-canfd
> >>> +    then:
> >>> +      properties:
> >>> +        renesas,no-can-fd: false
> >>
> >> Discovered by: opus-5-5 · Missed by: fable-5-1, gpt-6-astra,
> >> sashiko-gemini · Confirmed by: fable-5-1 This isn't a bug, but should the renesas,no-can-fd
> description be updated to match this new constraint?
> >>
> >> The property description in the same binding still says that every
> >> controller can run in Classical CAN
> >> mode:
> >>
> >>    renesas,no-can-fd:
> >>      $ref: /schemas/types.yaml#/definitions/flag
> >>      description:
> >>        The controller can operate in either CAN-FD mode (default) or FD-Only
> >>        mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
> >>        property to put the controller in Classical CAN mode.
> >>
> >> With this patch the property is forbidden for
> >> renesas,r9a08g045-canfd, because RZ/G3S does not have the mode select bits.
> >>
> >> The header comment in drivers/net/can/rcar/rcar_canfd.c says the same
> >> thing:
> >>
> >>   * To switch the controller to Classical CAN (CAN 2.0) only mode, add
> >>   * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is
> >>   * also required to switch modes.
> >>
> >> Neither text is changed later in the series. Both now contradict the
> >> schema for RZ/G3S, and for RZ/G3L once it is added the same way.
> >>
> >> Could the description exclude the SoCs that only support CAN FD mode?
> >
> >
> > Do you plan to update description of renesas,no-canfd in
> > bindings/driver exempting Classical CAN mode for RZ/G3S? Or do you want me to update?
> 
> I intend to send follow up patches today. If you already have something prepared for this, please send
> it.

OK I will rebase on top of the commit [1] and will send next version.

This has generic binding change from Krzysztof + RZ/G3S binding support.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git/commit/?id=2b4a5055d517b11bf4a5671cef32e4d77bc45626


Cheers,
Biju