Re: [PATCH 1/6] dt-bindings: thermal: thermal-zones: add hardware-binning trip properties

[Gaurav Kohli]

On 10/13/2026 11:54 AM, Krzysztof Kozlowski wrote:
> On Fri, Oct 02, 2026 at 04:16:56PM +0530, Gaurav Kohli wrote:
> > From: Amit Kucheria <amit.kucheria@xxxxxxxxxxxxxxxx>
> >
> > Differences in SoC packaging can be used to provide multiple SoC SKUs at
> > different thermal and performance characteristics. The underlying SoC
> > remains the same except for how much heat the packaging can dissipate,
> > thereby influencing the critical trip point at which an SoC SKU needs to
> > be throttled. This SKU-specific data is typically burned into fuses
> > during manufacturing and can be read back at runtime.
> >
> > Add two optional trip-point properties to describe this:
> >
> >    - 'temperature-bin': an array of per-bin trip temperatures, used
> >      instead of 'temperature' when the trip depends on the hardware
> >      revision encoded in fuses.
> >
> >    - 'thermal-hw-bin': one or more bitmask groups describing the hardware
> >      revisions for which a trip point is valid, modeled on the
> >      'opp-supported-hw' property of the OPP framework.
> >
> > Signed-off-by: Amit Kucheria <amit.kucheria@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Gaurav Kohli <gaurav.kohli@xxxxxxxxxxxxxxxx>
> > ---
> >   .../devicetree/bindings/thermal/thermal-zones.yaml | 53 +++++++++++++++++++++-
> >   1 file changed, 52 insertions(+), 1 deletion(-)
>
> 10 days was enough for replies to feedback, so dropping from patchwork.

Hi Krzysztof,

Apologies for the delayed response. I was away on leave.
Working through the Sashiko comments and will post a v2 addressing
them.

> Best regards,
> Krzysztof