[PATCH 2/3] soc: qcom: spm: don't clobber the SAW control registers

[Dmitry Baryshkov]

The SAWv4.1 and SAWv2.3 register tables have no sequence entry, so
probe copies the all-zero sequence buffer to offset 0 instead, wiping
the SPM_CTL, SPM_DLY and SAW_CFG values the boot firmware programmed.
On MSM8998 the firmware then still powers the gold cluster down once
its last CPU goes offline, but never brings it back: PSCI CPU_ON leaves
the first CPU pending and the SoC hangs or resets.

Only write the sequence when the SAW has a sequence entry, like the
other registers.

Fixes: 13e72c3e2261 ("soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
---
 drivers/soc/qcom/spm.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
index d41c94d32b51..6f2f14eb9022 100644
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
@@ -528,9 +528,11 @@ static int spm_dev_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, drv);
 
 	/* Write the SPM sequences first.. */
-	addr = drv->reg_base + drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY];
-	__iowrite32_copy(addr, drv->reg_data->seq,
-			ARRAY_SIZE(drv->reg_data->seq) / 4);
+	if (drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY]) {
+		addr = drv->reg_base + drv->reg_data->reg_offset[SPM_REG_SEQ_ENTRY];
+		__iowrite32_copy(addr, drv->reg_data->seq,
+				 ARRAY_SIZE(drv->reg_data->seq) / 4);
+	}
 
 	/*
 	 * ..and then the control registers.

-- 
2.47.3