[PATCH 01/10] PCI: Factor out BAR sizing from pci_read_bases()
From: David Matlack
Date: Mon Oct 19 2026 - 17:35:34 EST
Move the code that sizes the standard BARs and the Expansion ROM BAR,
including disabling decoding while sizing, out of pci_read_bases() and
into a new helper, pci_size_bases().
A subsequent commit will obtain the sizes of the BARs of devices
preserved across Live Update from the previous kernel instead of sizing
them, since sizing requires disabling decoding.
No functional change intended.
Assisted-by: LLM
Signed-off-by: David Matlack <dmatlack@xxxxxxxxxx>
---
drivers/pci/probe.c | 35 +++++++++++++++++++++--------------
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index debe0ad1ef68..9187f1d91766 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -323,22 +323,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
}
-static __always_inline void pci_read_bases(struct pci_dev *dev,
- unsigned int howmany, int rom)
+static void pci_size_bases(struct pci_dev *dev, unsigned int howmany, int rom,
+ u32 *stdbars, u32 *rombar)
{
- u32 rombar, stdbars[PCI_STD_NUM_BARS];
- unsigned int pos, reg;
u16 orig_cmd;
- BUILD_BUG_ON(statically_true(howmany > PCI_STD_NUM_BARS));
-
- if (dev->non_compliant_bars)
- return;
-
- /* Per PCIe r4.0, sec 9.3.4.1.11, the VF BARs are all RO Zero */
- if (dev->is_virtfn)
- return;
-
/* No printks while decoding is disabled! */
if (!dev->mmio_always_on) {
pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
@@ -350,11 +339,29 @@ static __always_inline void pci_read_bases(struct pci_dev *dev,
__pci_size_stdbars(dev, howmany, PCI_BASE_ADDRESS_0, stdbars);
if (rom)
- __pci_size_rom(dev, rom, &rombar);
+ __pci_size_rom(dev, rom, rombar);
if (!dev->mmio_always_on &&
(orig_cmd & PCI_COMMAND_DECODE_ENABLE))
pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
+}
+
+static __always_inline void pci_read_bases(struct pci_dev *dev,
+ unsigned int howmany, int rom)
+{
+ u32 rombar, stdbars[PCI_STD_NUM_BARS];
+ unsigned int pos, reg;
+
+ BUILD_BUG_ON(statically_true(howmany > PCI_STD_NUM_BARS));
+
+ if (dev->non_compliant_bars)
+ return;
+
+ /* Per PCIe r4.0, sec 9.3.4.1.11, the VF BARs are all RO Zero */
+ if (dev->is_virtfn)
+ return;
+
+ pci_size_bases(dev, howmany, rom, stdbars, &rombar);
for (pos = 0; pos < howmany; pos++) {
struct resource *res = &dev->resource[pos];
--
2.56.0.212.g129ede20d9-goog