[PATCH v5 17/17] arm64: dts: renesas: r8a779h0: Describe the PCIe AER interrupt
From: Koichiro Den
Date: Mon Oct 19 2026 - 23:20:17 EST
The PCIe controller reports Root Port AER notifications through SPI 454,
separately from the integrated MSI receiver interrupt. Describe this
interrupt with the "aer" name so the controller driver can use it for
Root Port error reporting.
Append the new interrupt to preserve the existing interrupt indices.
Suggested-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxxxx>
Reviewed-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxxxx>
Signed-off-by: Koichiro Den <den@xxxxxxxxxxxxx>
---
Changes since v4:
- Add Marek's Reviewed-by tag. No code changes.
arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
index 5f9223a0f446..a377aab3c8be 100644
--- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
@@ -683,8 +683,9 @@ pciec0: pcie@e65d0000 {
interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi", "dma", "sft_ce", "app";
+ <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi", "dma", "sft_ce", "app", "aer";
clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
clock-names = "core", "ref";
power-domains = <&sysc R8A779H0_PD_A2PCIPHY>;
--
2.54.0