Re: [PATCH 1/2] dt-bindings: iio: adc: add TI ADS1299
From: Krzysztof Kozlowski
Date: Tue Oct 20 2026 - 03:46:46 EST
On Sun, Oct 18, 2026 at 09:12:46PM -0300, Stephan Costa Barros wrote:
> The ADS1299 is an 8-channel, 24-bit, simultaneous-sampling biopotential
> (EEG) analog front-end with an SPI interface. The ADS1299-6 and ADS1299-4
> are the same part with six and four channels.
>
> One converter can drive its clock out of its CLK pin to the others
> (#clock-cells), and converters sharing a chip select in daisy-chain mode
> are described as one node with #daisy-chained-devices.
>
> Signed-off-by: Stephan Costa Barros <stephanbrrs8@xxxxxxxxx>
> ---
> .../bindings/iio/adc/ti,ads1299.yaml | 221 ++++++++++++++++++
> MAINTAINERS | 6 +
> 2 files changed, 227 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/ti,ads1299.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1299.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1299.yaml
> new file mode 100644
> index 000000000..a8966cd07
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1299.yaml
> @@ -0,0 +1,221 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/ti,ads1299.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments ADS1299 biopotential analog front-end
> +
> +maintainers:
> + - Stephan Costa Barros <stephanbrrs8@xxxxxxxxx>
> +
> +description: |
> + Texas Instruments ADS1299 family: low-noise, 24-bit, simultaneous-sampling
> + biopotential (EEG) analog front-ends with an SPI interface. The ADS1299 has
> + eight channels, the ADS1299-6 six and the ADS1299-4 four.
> +
> + Each channel has its own programmable gain amplifier and a multiplexer that
> + can select the electrode inputs, a shorted input, the internal test signal,
> + the supply or the temperature sensor. The part also provides lead-off
> + detection and a bias drive amplifier for the driven reference electrode.
> +
> + The converter signals a completed conversion on its DRDY output and is read
> + over SPI in mode 1 (CPOL=0, CPHA=1).
> +
> + Several converters can share one SPI bus in two ways. In cascaded mode each
> + has its own chip select and its own node; one of them can drive its internal
> + oscillator out of its CLK pin (#clock-cells) for the others to use as their
> + external clock. In daisy-chain mode they share the chip select and DIN, the
> + DOUT of each one feeds the DAISY_IN of the one before it, and the chain is a
> + single node with #daisy-chained-devices. A daisy chain shares DIN, so every
> + register write reaches every device: the devices run with one configuration
> + and from one external clock, and the bias drive amplifier cannot be used.
> +
> + https://www.ti.com/lit/gpn/ads1299
> +
> +properties:
> + compatible:
> + enum:
> + - ti,ads1299
This should be then "-8" variant?
> + - ti,ads1299-4
> + - ti,ads1299-6
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> + description:
> + The DRDY output of the converter, asserted low when a conversion is
> + ready to be read.
> +
> + reset-gpios:
> + maxItems: 1
> + description: The active-low RESET input of the converter.
> +
> + powerdown-gpios:
> + maxItems: 1
> + description:
> + The active-low PWDN input.
> +
> + clocks:
> + maxItems: 1
> + description:
> + External clock on the CLK pin, used when the CLKSEL pin selects an
> + external clock. Omit when the part runs from its internal oscillator.
> +
> + clock-names:
> + const: clk
Drop clock-names
> +
> + '#clock-cells':
> + const: 0
> + description:
> + The CLK pin as a clock output, for a part whose CLKSEL pin selects the
> + internal oscillator.
> +
> + clock-output-names:
> + maxItems: 1
Best regards,
Krzysztof