[PATCH v11 6/9] gpio: pl061: use cleanup helpers for locks

From: Long Zhao via B4 Relay

Date: Tue Oct 20 2026 - 03:59:56 EST


From: Long Zhao <longzhao@xxxxxxxxxxxxx>

Convert raw_spinlock critical sections to guard()() from cleanup.h.

Reviewed-by: Linus Walleij <linusw@xxxxxxxxxx>
Signed-off-by: Long Zhao <longzhao@xxxxxxxxxxxxx>
---
drivers/gpio/gpio-pl061.c | 27 ++++++++++-----------------
1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 1937941745f4..bbf457a12851 100644
--- a/drivers/gpio/gpio-pl061.c
+++ b/drivers/gpio/gpio-pl061.c
@@ -10,6 +10,7 @@
*/
#include <linux/amba/bus.h>
#include <linux/bitops.h>
+#include <linux/cleanup.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/gpio/driver.h>
@@ -105,11 +106,10 @@ static int pl061_get_direction(struct gpio_chip *gc, unsigned offset)
static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
{
struct pl061 *pl061 = gpiochip_get_data(gc);
- unsigned long flags;

- raw_spin_lock_irqsave(&pl061->lock, flags);
+ guard(raw_spinlock_irqsave)(&pl061->lock);
+
regmap_clear_bits(pl061->regmap, GPIODIR, BIT(offset));
- raw_spin_unlock_irqrestore(&pl061->lock, flags);

return 0;
}
@@ -118,10 +118,10 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
int value)
{
struct pl061 *pl061 = gpiochip_get_data(gc);
- unsigned long flags;
unsigned int mask = BIT(offset);

- raw_spin_lock_irqsave(&pl061->lock, flags);
+ guard(raw_spinlock_irqsave)(&pl061->lock);
+
regmap_assign_bits(pl061->regmap, BIT(offset + PL061_DATA_OFFSET),
BIT(offset), value);
regmap_set_bits(pl061->regmap, GPIODIR, mask);
@@ -132,7 +132,6 @@ static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
*/
regmap_assign_bits(pl061->regmap, BIT(offset + PL061_DATA_OFFSET),
BIT(offset), value);
- raw_spin_unlock_irqrestore(&pl061->lock, flags);

return 0;
}
@@ -163,7 +162,6 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
unsigned int gpioiev = 0;
unsigned int gpioibe = 0;
unsigned int gpiois = 0;
- unsigned long flags;

if (offset < 0 || offset >= PL061_GPIO_NR)
return -EINVAL;
@@ -176,8 +174,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
return -EINVAL;
}

-
- raw_spin_lock_irqsave(&pl061->lock, flags);
+ guard(raw_spinlock_irqsave)(&pl061->lock);

regmap_read(pl061->regmap, GPIOIEV, &gpioiev);
regmap_read(pl061->regmap, GPIOIS, &gpiois);
@@ -237,8 +234,6 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger)
regmap_write(pl061->regmap, GPIOIBE, gpioibe);
regmap_write(pl061->regmap, GPIOIEV, gpioiev);

- raw_spin_unlock_irqrestore(&pl061->lock, flags);
-
return 0;
}

@@ -267,9 +262,8 @@ static void pl061_irq_mask(struct irq_data *d)
struct pl061 *pl061 = gpiochip_get_data(gc);
u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);

- raw_spin_lock(&pl061->lock);
- regmap_clear_bits(pl061->regmap, GPIOIE, mask);
- raw_spin_unlock(&pl061->lock);
+ scoped_guard(raw_spinlock, &pl061->lock)
+ regmap_clear_bits(pl061->regmap, GPIOIE, mask);

gpiochip_disable_irq(gc, d->hwirq);
}
@@ -282,9 +276,8 @@ static void pl061_irq_unmask(struct irq_data *d)

gpiochip_enable_irq(gc, d->hwirq);

- raw_spin_lock(&pl061->lock);
- regmap_set_bits(pl061->regmap, GPIOIE, mask);
- raw_spin_unlock(&pl061->lock);
+ scoped_guard(raw_spinlock, &pl061->lock)
+ regmap_set_bits(pl061->regmap, GPIOIE, mask);
}

/**

--
2.34.1