Re: [PATCH 3/6] dt-bindings: mailbox: Add AMD PL Mailbox IP
From: Krzysztof Kozlowski
Date: Tue Oct 20 2026 - 08:18:49 EST
On 16/10/2026 16:11, Shah, Tanmay wrote:
>
>
> On 10/16/2026 8:59 AM, Krzysztof Kozlowski wrote:
>> On 15/10/2026 17:31, Shah, Tanmay wrote:
>>> We use 'amd' vendor prefix for all new drivers & bindings. Also, there
>>> is dedicated IPI hardware which can be used as mailbox too, and we
>>> should distinguish it with this PL mailbox. So I that is included in the
>>> compatible string. (pl-mbox).
>>>
>>> If we are also to include SOC name as well (per compatible property
>>> guideline), then we should include one of the SOC name as well:
>>>
>>> So, I think 'amd,zynqmp-pl-mbox-2.1' is good.
>>>
>>> Krzysztof, are you okay with above name? The 2.1 is FPGA IP design
>>> version number and not the SOC version number. So in future let's say
>>> that FPGA IP design is improved then the name (pl-mbox) will remain
>>> same, but only version number will be updated i.e. (from 2.1 to 3.0). Is
>>> it okay if we explicitly mention this in the binding description?
>>
>> So you will release the same SoC with different versions of the block?
>>
>
> Yes correct.
Well, then this does not look like SoC block at all.
Best regards,
Krzysztof