Re: [PATCH 2/3] clk: bcm2835: register the BCM2711 GISB clock
From: Florian Fainelli
Date: Tue Oct 20 2026 - 12:01:11 EST
On 10/20/26 07:58, Nicolai Buchwitz wrote:
The generator at CM offset 0x1d8 is not in any documentation I could
find, but the firmware calls it gisb and runs it at 200 MHz off
PLLD_PER with a 3.75 divider. GISB is the register bus of the STB
peripherals, and on BCM2711 the GENET MDIO controller clocks its MDC
from it. mdio-bcm-unimac wants that rate to work out the MDC period.
Mark it critical. The firmware enables it at boot and nothing in Linux
owns it, so it must never be gated.
Checked on a Raspberry Pi CM4 by moving the divider at runtime, the
MDIO busy time follows it.
Signed-off-by: Nicolai Buchwitz <nb@xxxxxxxxxxx>
Reviewed-by: Florian Fainelli <florian.fainelli@xxxxxxxxxxxx>
---
drivers/clk/bcm/clk-bcm2835.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 118df86d717c6..bc1de20c7e00e 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -117,6 +117,8 @@
#define CM_EMMCDIV 0x1c4
#define CM_EMMC2CTL 0x1d0
#define CM_EMMC2DIV 0x1d4
+#define CM_GISBCTL 0x1d8
+#define CM_GISBDIV 0x1dc
Yes, those names are correct and accurate here.
--
Florian