[PATCH RFC v2 4/5] arm64: dts: qcom: nord-ride-embedded: Add sound support
From: Shawn Guo
Date: Wed Oct 21 2026 - 03:39:12 EST
From: Mohammad Rafi Shaik <mohammad.rafi.shaik@xxxxxxxxxxxxxxxx>
Enable audio on the nord-ride-embedded board. Add a soundcard node using
the qcom,nord-sndcard compatible.
Add PCM1681/ADAU1979 codec nodes on I2C18, with the PCM1681 system
clock supplied via MCLK0. The DAC control lines come off a TCA6408 I/O
expander on the same bus.
Describe DAC_ENABLE as the enable of two regulator-fixed supplies
(3.3V and 5V load switches) feeding the PCM1681, and the three MAX9892
click-and-pop suppressors as one simple-audio-amplifier on
CLICK_POP_MUTE_N, routed after VOUT1..6, so DAPM controls the mute.
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@xxxxxxxxxxxxxxxx>
Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 30 ++++
.../boot/dts/qcom/nord-ride-embedded.dts | 166 ++++++++++++++++++
2 files changed, 196 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
index 1ead642254e0..8f07f9f9ac62 100644
--- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
+++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
@@ -1106,6 +1106,36 @@ nsp_data_noc_3: interconnect@1fe00000 {
};
&tlmm {
+ aud_intfc8_mi2s_active: aud-intfc8-mi2s-active-state {
+ data-pins {
+ pins = "gpio75", "gpio76";
+ function = "aud_intfc8_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ sclk-pins {
+ pins = "gpio73";
+ function = "aud_intfc8_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ ws-pins {
+ pins = "gpio74";
+ function = "aud_intfc8_ws";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ aud_mclk0_mira_active: aud-mclk0-mira-active-state {
+ pins = "gpio99";
+ function = "aud_mclk0_mira";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
qup_i2c0_default: qup-i2c0-default-state {
pins = "gpio111", "gpio112";
function = "qup0_se0";
diff --git a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
index 49635695f832..34119b80d395 100644
--- a/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
+++ b/arch/arm64/boot/dts/qcom/nord-ride-embedded.dts
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
#include "nord-embedded.dtsi"
#include "pmau0102-nord.dtsi"
@@ -53,6 +54,107 @@ bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk {
clock-div = <2>;
};
};
+
+ /*
+ * MAX9892 click-and-pop suppressors on the PCM1681 line outputs. All
+ * three parts are muted by a single CLICK_POP_MUTE_N line, so describe
+ * them as one amplifier.
+ */
+ lineout_amp: amplifier {
+ compatible = "simple-audio-amplifier";
+ sound-name-prefix = "LineOut";
+ enable-gpios = <&expander0 5 GPIO_ACTIVE_HIGH>;
+ VCC-supply = <&vreg_per_3p3>;
+ };
+
+ sound {
+ compatible = "qcom,nord-sndcard";
+ model = "NORD-RIDE";
+
+ aux-devs = <&lineout_amp>;
+ audio-routing = "LineOut INL", "VOUT1",
+ "LineOut INR", "VOUT2",
+ "LineOut INL", "VOUT3",
+ "LineOut INR", "VOUT4",
+ "LineOut INL", "VOUT5",
+ "LineOut INR", "VOUT6";
+
+ pinctrl-0 = <&aud_intfc8_mi2s_active>;
+ pinctrl-names = "default";
+
+ aud-intfc8-tdm-playback-dai-link {
+ link-name = "PCM1681 Playback";
+
+ codec {
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ dai-tdm-slot-rx-mask = <1 1 1 1 1 1>;
+ sound-dai = <&pcm1681>;
+ };
+
+ cpu {
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ dai-tdm-slot-tx-mask = <1 1 1 1 1 1>;
+ sound-dai = <&q6apmbedai AIF_TDM_RX_8>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+
+ aud-intfc8-tdm-capture-dai-link {
+ link-name = "ADAU1979 Capture";
+
+ codec {
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ dai-tdm-slot-rx-mask = <1 1 1 1>;
+ sound-dai = <&adau1979>;
+ };
+
+ cpu {
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ dai-tdm-slot-rx-mask = <1 1 1 1>;
+ sound-dai = <&q6apmbedai AIF_TDM_TX_8>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
+ };
+
+ /*
+ * DAC_ENABLE gates two load switches feeding the PCM1681, one for the
+ * analog and one for the digital supply.
+ */
+ vreg_3p3_dac: regulator-3p3-dac {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_3p3_dac";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vreg_5p0_dac: regulator-5p0-dac {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_5p0_dac";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&expander0 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vreg_per_3p3: regulator-per-3p3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_per_3p3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
};
&apps_rsc {
@@ -366,6 +468,70 @@ vreg_l3l_1p8: ldo3 {
};
};
+&i2c18 {
+ clock-frequency = <400000>;
+
+ status = "okay";
+
+ expander0: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&pmau0102_l_gpios 6 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&pmau0102_l_gpios 5 GPIO_ACTIVE_LOW>;
+ vcc-supply =<&vreg_per_3p3>;
+ };
+
+ /* ADI ADAU1979 - 4-channel 24-bit ADC */
+ adau1979: adau1979@31 {
+ compatible = "adi,adau1979";
+ reg = <0x31>;
+
+ AVDD-supply = <&vreg_per_3p3>;
+ #sound-dai-cells = <0>;
+ };
+
+ /* PCM1681 DAC */
+ pcm1681: pcm1681@4c {
+ compatible = "ti,pcm1681";
+ reg = <0x4c>;
+
+ pinctrl-0 = <&aud_mclk0_mira_active>;
+ pinctrl-names = "default";
+
+ clocks = <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "sck";
+ assigned-clocks = <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ assigned-clock-rates = <12288000>;
+
+ VCC1-supply = <&vreg_5p0_dac>;
+ VCC2-supply = <&vreg_5p0_dac>;
+ VDD-supply = <&vreg_3p3_dac>;
+
+ #sound-dai-cells = <0>;
+ };
+};
+
+&q6apmbedai {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dai@195 {
+ reg = <AIF_TDM_RX_8>;
+ clocks = <&q6prmcc LPASS_CLK_ID_QAIF_IF8_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "bclk";
+ };
+
+ dai@196 {
+ reg = <AIF_TDM_TX_8>;
+ clocks = <&q6prmcc LPASS_CLK_ID_QAIF_IF8_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "bclk";
+ };
+};
+
&qupv3_0 {
firmware-name = "qcom/nord/qupv3fw.elf";
--
2.43.0