Re: [PATCH v5 2/2] selftests/resctrl: Recognise aarch64 as a vendor for L3_NONCONT_CAT

[Ben Horgan]

Hi Reinette, Richard,

On 21/10/2026 15:56, Reinette Chatre wrote:
> Hi Ben,
> 
> On 10/20/26 9:18 AM, Ben Horgan wrote:
>> On 12/10/2026 08:47, Richard Cheng wrote:
> 
>>> diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
>>> index 0a417267dd74..f4b02b3eedd7 100644
>>> --- a/tools/testing/selftests/resctrl/cat_test.c
>>> +++ b/tools/testing/selftests/resctrl/cat_test.c
>>> @@ -271,8 +271,13 @@ static bool arch_supports_noncont_cat(const struct resctrl_test *test)
>>>  {
>>>  	unsigned int vendor_id = get_vendor();
>>>  
>>> -	/* AMD and Hygon always support non-contiguous CBM. */
>>> -	if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON)
>>> +	/*
>>> +	 * AMD and Hygon always support non-contiguous CBM. ARM/MPAM defines
>>> +	 * MPAMCFG_CPBM as a bitmap with no contiguity constraint per ARM
>>> +	 * DDI 0598.

Nit: DDI 0598 is retired. The new spec version is IHI0099.

>>> +	 */
>>> +	if (vendor_id == ARCH_AMD || vendor_id == ARCH_HYGON ||
>>> +	    vendor_id == ARCH_ARM)
>>>  		return true;
>>
>> Would it be better not to just to use the information resctrl advertises?
>> /sys/fs/resctrl/info/L3/sparse_masks
> 
> The result of this architecture specific test is used to validate that 
> /sys/fs/resctrl/info/L3/sparse_masks provides accurate information.
> 
> This test was originally developed on Intel where support for
> sparse masks need to be discovered from the hardware. 

Ah ok, thanks for putting me straight.  The defined(__aarch64__) check looks to be the common way of
checking in the selftests. This looks fine to me.

Reviewed-by: Ben Horgan <ben.horgan@xxxxxxx>

Thanks,

Ben

> 
>>
>> Is there any reason this test doesn't use that other than being written before its introduction?
> Reinette