[PATCH v5 0/2] Add SMCCC cache clean/invalidate provider

[Srirangan Madhavan]

This series adds an arm64 backend for memregion cache invalidation users
based on the Arm SMCCC cache clean+invalidate interface.

Per DEN0028, this interface targets systems where a Normal Cacheable
memory region can be modified in ways that are not handled by usual PE
coherency mechanisms, and where VA-based CMOs may be too slow or
insufficient for large ranges and/or system-cache implementations.

Representative use cases include device-backed memory state transitions
where stale CPU/system cache lines must be invalidated reliably (for
example secure erase, reset/offline flows, and dynamic memory
reconfiguration).

Patch 1 introduces the Arm SMCCC cache clean/invalidate function IDs and
transient return codes needed by callers [1].

Patch 2 adds a cache maintenance provider that:
- registers the interface attributes function as an SMCCC device
- binds to the service through the SMCCC bus
- registers with the generic cache coherency framework used by
  cpu_cache_invalidate_memregion()
- handles transient BUSY/RATE_LIMITED responses with bounded retries

This patch set does not add a software fallback path; when firmware does
not implement the SMCCC cache maintenance interface, the SMCCC device is
not registered and existing behavior is preserved.

The series is based on the current SMCCC bus topic branch queued for
v7.4 [3].

Testing:
- With corresponding TF-A support enabled, exercised the cache operation
  path through CXL Reset [2] and verified that it invokes the SMCCC call and
  completes the cache flush successfully.
- ARM64 defconfig with CONFIG_CACHEMAINT_FOR_HOTPLUG=y and
  CONFIG_ARM_SMCCC_CACHE=y
- W=1 build of drivers/cache/arm_smccc_cache.o
- W=1 build of the ARM64 Image

Changes since v4 [4]:
- Dropped the firmware latency attribute from the retry backoff calculation.
- Used the explicit cache attributes function ID when reading the firmware
  attributes during probe.
- Added Jonathan's Reviewed-by tag to patch 2.

References:
[1] https://developer.arm.com/documentation/den0028/h
[2] https://lore.kernel.org/linux-cxl/20260902072804.665639-1-smadhavan@xxxxxxxxxx/
[3] https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=for-next/smccc-bus
[4] https://lore.kernel.org/linux-arm-kernel/20261013070205.3566865-1-smadhavan@xxxxxxxxxx/

Srirangan Madhavan (2):
  arm64: smccc: add cache clean/invalidate IDs and return codes
  cache: add SMCCC-backed cache invalidate provider

 drivers/cache/Kconfig           |  11 +++
 drivers/cache/Makefile          |   2 +
 drivers/cache/arm_smccc_cache.c | 156 ++++++++++++++++++++++++++++++++
 drivers/firmware/smccc/smccc.c  |   5 +
 include/linux/arm-smccc.h       |  21 ++++-
 5 files changed, 193 insertions(+), 2 deletions(-)
 create mode 100644 drivers/cache/arm_smccc_cache.c


base-commit: c6e78a4080a3b310a9f61db778d6dee7bc646cb7
-- 
2.43.0