Re: [PATCH v2 1/2] dt-bindings: bus: Add Altera AXI Timeout Bridge

[Rob Herring (Arm)]

On Wed, 21 Oct 2026 19:56:23 +0000, Vyacheslav Yurkov wrote:
> The Altera AXI Timeout Bridge is an FPGA IP core placed between an AXI
> host, such as the HPS-to-FPGA bridge, and peripherals implemented in
> the FPGA fabric. It forwards transactions unchanged and monitors each
> one for completion. If a peripheral does not respond in time, the
> bridge terminates the transaction with an error response so that the
> host does not hang, raises an interrupt, and reports the address of
> the timed-out transaction in its control and status registers.
> 
> Signed-off-by: Vyacheslav Yurkov <V.Yurkov.EXT@xxxxxxxxxx>
> ---
>  .../bindings/bus/altr,axi-timeout-bridge-1.0.yaml  | 80 ++++++++++++++++++++++
>  1 file changed, 80 insertions(+)
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/bus/altr,axi-timeout-bridge-1.0.example.dtb: /example-0/timeout-bridge@10000/timeout-device@100: failed to match any schema with compatible: ['timeout-device']

doc reference errors (make refcheckdocs):

See https://patchwork.kernel.org/project/devicetree/patch/20261021-feature-timeout-ip-v2-1-a037be089518@xxxxxxxxxx

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.