[PATCH] selftests: riscv: check all elements in vector register init test

[Zongmin Zhou]

From: Zongmin Zhou <zhouzongmin@xxxxxxxxxx>

The register scrubbing test attempts to read each element with
vmv.x.s and advance to the next element with vsrl.vi reg, reg, 8.
However, vsrl.vi shifts each element independently and never moves
the next element into element 0.  With SEW=8, the immediate 8 is
also truncated to 0, making the instruction a no-op.  The loop
therefore re-reads element 0 vl times, and leftover data in any
other element goes unnoticed.

Replace the shift with vslidedown.vi reg, reg, 1, which actually
moves the elements down by one.  The instruction has the same
encoding in RVV 1.0 and the T-Head vector extension 0.7.1, so it is
safe to use on both code paths of the test.

Fixes: 57d7713af93e ("selftests: riscv: Fix vector tests")
Signed-off-by: Zongmin Zhou <zhouzongmin@xxxxxxxxxx>
---
 tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c b/tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c
index 91e31f185b85..7f6fb0f93691 100644
--- a/tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c
+++ b/tools/testing/selftests/riscv/vector/v_exec_initval_nolibc.c
@@ -40,7 +40,8 @@ int main(int argc, char **argv)
 			".option push\n\t"					\
 			".option arch, +v\n\t"					\
 			"vmv.x.s %0, " __stringify(register) "\n\t"		\
-			"vsrl.vi " __stringify(register) ", " __stringify(register) ", 8\n\t" \
+			"vslidedown.vi " __stringify(register) ", " \
+				__stringify(register) ", 1\n\t" \
 			".option pop\n\t"					\
 			: "=r" (value));					\
 		if (value != 0x00) {						\
-- 
2.34.1


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