Re: [PATCH 4/8] i3c: renesas: Add RZ/G3L support

[Wolfram Sang]

On Fri, Oct 23, 2026 at 10:28:16AM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 20, 2026 at 10:14:58AM +0100, Diogo Ivo wrote:
> > Add support for the I3C Bus Interface on the Renesas RZ/G3L (R9A08G046)
> > SoC by adding the renesas,r9a08g046-i3c compatible to the OF match
> > table.
> > 
> > The controller is very similar to the IP on the RZ/G3S. However, for
> > instance the RZ/G3L variant has no HDR Exit Pattern detection interrupt:
> > RZ/G3S exposes 17 interrupts, while RZ/G3L exposes 16. A RZ/G3L node
> > therefore cannot be described with the RZ/G3S compatible, as its bindings
> > require at least 17 interrupts. The same point applies to RZ/G3E, that
> > requires 3 clocks while the RZ/G3L requires 2.
> > 
> > From the driver point of view there is no difference between the two
> > SoCs: the driver only consumes the tclk clock, the presetn and tresetn
> > resets and seven named interrupts (resp, rx, tx, st, sp, tend, nack),
> > all of which are among the 16 shared ones. No driver changes are needed
> > besides the new compatible.
> > 
> > Signed-off-by: Diogo Ivo <diogo.ivo.sx@xxxxxxxxxxx>
> > ---
> >  drivers/i3c/master/renesas-i3c.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/i3c/master/renesas-i3c.c b/drivers/i3c/master/renesas-i3c.c
> > index 4fddc1b4fdbb..80a6df1151bf 100644
> > --- a/drivers/i3c/master/renesas-i3c.c
> > +++ b/drivers/i3c/master/renesas-i3c.c
> > @@ -1625,6 +1625,7 @@ static const struct dev_pm_ops renesas_i3c_pm_ops = {
> >  
> >  static const struct of_device_id renesas_i3c_of_ids[] = {
> >  	{ .compatible = "renesas,r9a08g045-i3c" },
> > +	{ .compatible = "renesas,r9a08g046-i3c" },
> 
> So fully compatible? If so, drop this and express compatibility in the
> bindings.

Well, this SoC has 16 irqs / 2 clocks. The other variants have 16 / 3
and 17 / 2. So, to which one should it be compatible? I'd think 17 / 2
is the easier one.

Or should we even refactor r9a08g047-i3c to be compatible with
r9a08g045-i3c ? We currently don't use the third clock as well. That
would mean deprecation of the old plain 'r9a08g047-i3c' binding, of
course.

Opinions?

(And yes, hooray to having all permutations per SoC. Waiting for the
next one to have 17 / 3 :/ )