[PATCH v7 3/4] dmaengine: fsl-edma: convert DMAMUX clock handling to bulk clock API
From: joy . zou
Date: Fri Oct 23 2026 - 06:55:54 EST
From: Joy Zou <joy.zou@xxxxxxx>
Convert the DMAMUX clock management from individual clock operations
to the bulk clock API to simplify the code.
Prepare to add edma engine runtime pm support.
Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
Signed-off-by: Joy Zou <joy.zou@xxxxxxx>
---
Changes for v7:
- Replace devm_clk_bulk_get_optional() with devm_clk_bulk_get_optional_enable().
Changes for v6:
- Replace devm_clk_bulk_get_optional_enable() with devm_clk_bulk_get_optional()
and clk_bulk_prepare_enable() in order to use runtime PM for power
management later.
- add Reviewed-by tag.
- Link to v5: https://lore.kernel.org/imx/20260513-b4-b4-edma-runtime-opt-v5-0-1e595bfb8423@xxxxxxx/
---
drivers/dma/fsl-edma-common.h | 2 +-
drivers/dma/fsl-edma-main.c | 41 +++++++++++++++++++----------------------
2 files changed, 20 insertions(+), 23 deletions(-)
diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h
index 97b3a9872e90..12db403204c5 100644
--- a/drivers/dma/fsl-edma-common.h
+++ b/drivers/dma/fsl-edma-common.h
@@ -260,7 +260,7 @@ struct fsl_edma_engine {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *muxbase[DMAMUX_NR];
- struct clk *muxclk[DMAMUX_NR];
+ struct clk_bulk_data *muxclk;
struct clk *dmaclk;
struct mutex fsl_edma_mutex;
const struct fsl_edma_drvdata *drvdata;
diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index bc94554bc36c..be9bd9cc6630 100644
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c
@@ -531,14 +531,6 @@ static void fsl_edma_irq_exit(
}
}
-static void fsl_disable_clocks(struct fsl_edma_engine *fsl_edma, int nr_clocks)
-{
- int i;
-
- for (i = 0; i < nr_clocks; i++)
- clk_disable_unprepare(fsl_edma->muxclk[i]);
-}
-
static struct fsl_edma_drvdata vf610_data = {
.dmamuxs = DMAMUX_NR,
.flags = FSL_EDMA_DRV_WRAP_IO,
@@ -752,23 +744,28 @@ static int fsl_edma_probe(struct platform_device *pdev)
fsl_edma->chan_masked |= chan_mask[0];
}
- for (i = 0; i < fsl_edma->drvdata->dmamuxs; i++) {
- char clkname[32];
+ if (fsl_edma->drvdata->dmamuxs) {
+ fsl_edma->muxclk = devm_kcalloc(&pdev->dev, fsl_edma->drvdata->dmamuxs,
+ sizeof(*fsl_edma->muxclk), GFP_KERNEL);
+ if (!fsl_edma->muxclk)
+ return -ENOMEM;
+
+ for (i = 0; i < fsl_edma->drvdata->dmamuxs; i++) {
+ fsl_edma->muxbase[i] = devm_platform_ioremap_resource(pdev, 1 + i);
+ if (IS_ERR(fsl_edma->muxbase[i]))
+ return PTR_ERR(fsl_edma->muxbase[i]);
- fsl_edma->muxbase[i] = devm_platform_ioremap_resource(pdev,
- 1 + i);
- if (IS_ERR(fsl_edma->muxbase[i])) {
- /* on error: disable all previously enabled clks */
- fsl_disable_clocks(fsl_edma, i);
- return PTR_ERR(fsl_edma->muxbase[i]);
+ fsl_edma->muxclk[i].id = devm_kasprintf(&pdev->dev, GFP_KERNEL,
+ "dmamux%d", i);
+ if (!fsl_edma->muxclk[i].id)
+ return -ENOMEM;
}
- sprintf(clkname, "dmamux%d", i);
- fsl_edma->muxclk[i] = devm_clk_get_enabled(&pdev->dev, clkname);
- if (IS_ERR(fsl_edma->muxclk[i]))
- return dev_err_probe(&pdev->dev,
- PTR_ERR(fsl_edma->muxclk[i]),
- "Missing DMAMUX block clock.\n");
+ ret = devm_clk_bulk_get_optional_enable(&pdev->dev, fsl_edma->drvdata->dmamuxs,
+ fsl_edma->muxclk);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "Failed to get/enable DMAMUX block clock.\n");
}
fsl_edma->big_endian = of_property_read_bool(np, "big-endian");
--
2.34.1