[PATCH 2/2] ASoC: es8328: set SLRCK for the ES8388

From: Bob Hui

Date: Sat Oct 24 2026 - 04:49:28 EST


The ES8388 has a single LRCK pin, so the DAC and the ADC have to take
their frame clock from that one pin. With SLRCK clear, which is the
power-on default, the capture path never gets a frame clock and records
digital silence while playback keeps working, so boards appear to have a
dead microphone.

Bit 7 of DAC Control 21 (register 0x2b) is SLRCK on the ES8388, but it
is LD2MO, left DAC to the mono mixer, on the ES8328, so only set it for
the ES8388.

Tested on a QuarkPi-CA2 (RK3588S, ES8388): capture goes from digital
silence to working audio.

Assisted-by: Hermes:deepseek-v4-flash
Signed-off-by: Bob Hui <bg9oxa@xxxxxxx>
---
sound/soc/codecs/es8328.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c
index d7f93de82f69..415f8c849271 100644
--- a/sound/soc/codecs/es8328.c
+++ b/sound/soc/codecs/es8328.c
@@ -13,6 +13,7 @@
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/slab.h>
+#include <linux/of.h>
#include <linux/regulator/consumer.h>
#include <sound/core.h>
#include <sound/initval.h>
@@ -836,8 +837,26 @@ static int es8328_component_probe(struct snd_soc_component *component)
goto clk_fail;
}

+ /*
+ * The ES8388 has a single LRCK pin, so the DAC and the ADC must
+ * share it: without SLRCK the capture path never gets a frame
+ * clock and records digital silence while playback still works.
+ * Bit 7 of DAC Control 21 is SLRCK on the ES8388 and LD2MO (left
+ * DAC to the mono mixer) on the ES8328, so write it only here.
+ */
+ if (of_device_is_compatible(component->dev->of_node,
+ "everest,es8388")) {
+ ret = snd_soc_component_write(component, ES8328_DACCONTROL21,
+ 0x80);
+ if (ret)
+ goto err_slrck;
+ }
+
return 0;

+err_slrck:
+ clk_disable_unprepare(es8328->clk);
+
clk_fail:
regulator_bulk_disable(ARRAY_SIZE(es8328->supplies),
es8328->supplies);

--
2.34.1