Re: [PATCH] staging: fbtft: fb_ra8875: Replace mdelay() and udelay() with sleep alternatives

[Julia Lawall]

This has the same problems as the other patch.  Please wait to have positive feedback on one patch before sending another.

> On 25 Oct 2026, at 06:54, Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx> wrote:
> 
> From 474546adc013fab098dfda25e6503413fddb9929 Mon Sep 17 00:00:00 2001
> From: Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx>
> Date: Sun, 25 Oct 2026 11:38:17 +0100
> Subject: [PATCH] staging: fbtft: fb_ra8875: Replace mdelay() and udelay() with
> sleep alternatives
> 
> Signed-off-by: Abubakar Musa Samaila <abubakarmusasamaila@xxxxxxxxx>
> ---
> drivers/staging/fbtft/fb_ra8875.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/staging/fbtft/fb_ra8875.c
> b/drivers/staging/fbtft/fb_ra8875.c
> index 0ab1de664..ded953636 100644
> --- a/drivers/staging/fbtft/fb_ra8875.c
> +++ b/drivers/staging/fbtft/fb_ra8875.c
> @@ -47,12 +47,12 @@ static int init_display(struct fbtft_par *par)
>                /* PLL clock frequency */
>                write_reg(par, 0x88, 0x0A);
>                write_reg(par, 0x89, 0x02);
> -               mdelay(10);
> +               usleep_range(10000, 11000);
>                /* color deep / MCU Interface */
>                write_reg(par, 0x10, 0x0C);
>                /* pixel clock period  */
>                write_reg(par, 0x04, 0x03);
> -               mdelay(1);
> +               usleep_range(1000, 2000);
>                /* horizontal settings */
>                write_reg(par, 0x14, 0x27);
>                write_reg(par, 0x15, 0x00);
> @@ -72,12 +72,12 @@ static int init_display(struct fbtft_par *par)
>                /* PLL clock frequency  */
>                write_reg(par, 0x88, 0x0A);
>                write_reg(par, 0x89, 0x02);
> -               mdelay(10);
> +               usleep_range(10000, 11000);
>                /* color deep / MCU Interface */
>                write_reg(par, 0x10, 0x0C);
>                /* pixel clock period  */
>                write_reg(par, 0x04, 0x82);
> -               mdelay(1);
> +               usleep_range(1000, 2000);
>                /* horizontal settings */
>                write_reg(par, 0x14, 0x3B);
>                write_reg(par, 0x15, 0x00);
> @@ -97,12 +97,12 @@ static int init_display(struct fbtft_par *par)
>                /* PLL clock frequency */
>                write_reg(par, 0x88, 0x0B);
>                write_reg(par, 0x89, 0x02);
> -               mdelay(10);
> +               usleep_range(10000, 11000);
>                /* color deep / MCU Interface */
>                write_reg(par, 0x10, 0x0C);
>                /* pixel clock period */
>                write_reg(par, 0x04, 0x01);
> -               mdelay(1);
> +               usleep_range(1000, 2000);
>                /* horizontal settings */
>                write_reg(par, 0x14, 0x4F);
>                write_reg(par, 0x15, 0x05);
> @@ -122,12 +122,12 @@ static int init_display(struct fbtft_par *par)
>                /* PLL clock frequency */
>                write_reg(par, 0x88, 0x0B);
>                write_reg(par, 0x89, 0x02);
> -               mdelay(10);
> +               usleep_range(10000, 11000);
>                /* color deep / MCU Interface */
>                write_reg(par, 0x10, 0x0C);
>                /* pixel clock period */
>                write_reg(par, 0x04, 0x81);
> -               mdelay(1);
> +               usleep_range(1000, 2000);
>                /* horizontal settings */
>                write_reg(par, 0x14, 0x63);
>                write_reg(par, 0x15, 0x03);
> @@ -150,11 +150,11 @@ static int init_display(struct fbtft_par *par)
>        /* PWM clock */
>        write_reg(par, 0x8a, 0x81);
>        write_reg(par, 0x8b, 0xFF);
> -       mdelay(10);
> +       usleep_range(10000, 11000);
> 
>        /* Display ON */
>        write_reg(par, 0x01, 0x80);
> -       mdelay(10);
> +       usleep_range(10000, 11000);
> 
>        return 0;
> }
> @@ -210,7 +210,7 @@ static void write_reg8_bus8(struct fbtft_par *par,
> int len, ...)
>        }
>        len--;
> 
> -       udelay(100);
> +       usleep_range(100, 150);
> 
>        if (len) {
>                buf = (u8 *)par->buf;
> @@ -231,7 +231,7 @@ static void write_reg8_bus8(struct fbtft_par *par,
> int len, ...)
> 
>        /* restore user spi-speed */
>        par->fbtftops.write = fbtft_write_spi;
> -       udelay(100);
> +       usleep_range(100, 150);
> }
> 
> static int write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len)
> --
> 2.34.1