[PATCH 1/4] dt-bindings: clock: Add Ingenic X1600 CGU bindings
From: H. Nikolaus Schaller
Date: Sun Oct 25 2026 - 15:21:05 EST
Add the device tree bindings and the clock ID definitions for the
Clock Generation Unit (CGU) of the Ingenic X1600 SoC.
The clock layout features specific I2S handling. To properly support
the I2S controllers on the X1600 without relying on complex compound
dividers that are not yet natively supported by the drivers, split
the structures to explicitly describe the additional I2S divider
fields. This design accounts for the current driver limitations
regarding division encoding while matching the hardware's internal
gating architecture.
Furthermore, introduce dedicated I2S0 RX and TX clock definitions to
allow independent and precise routing for I2S stream usage.
Co-developed-by: Paul Boddie <paul@xxxxxxxxxxxxx>
Signed-off-by: Paul Boddie <paul@xxxxxxxxxxxxx>
Co-developed-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx>
Signed-off-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx>
---
.../bindings/clock/ingenic,cgu.yaml | 2 +
include/dt-bindings/clock/ingenic,x1600-cgu.h | 64 +++++++++++++++++++
2 files changed, 66 insertions(+)
create mode 100644 include/dt-bindings/clock/ingenic,x1600-cgu.h
diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
index 509df06b9c9d8..c622131c5c49b 100644
--- a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
+++ b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
@@ -28,6 +28,7 @@ select:
- ingenic,jz4770-cgu
- ingenic,jz4780-cgu
- ingenic,x1000-cgu
+ - ingenic,x1600-cgu
- ingenic,x1830-cgu
required:
- compatible
@@ -58,6 +59,7 @@ properties:
- ingenic,jz4770-cgu
- ingenic,jz4780-cgu
- ingenic,x1000-cgu
+ - ingenic,x1600-cgu
- ingenic,x1830-cgu
- const: simple-mfd
minItems: 1
diff --git a/include/dt-bindings/clock/ingenic,x1600-cgu.h b/include/dt-bindings/clock/ingenic,x1600-cgu.h
new file mode 100644
index 0000000000000..a0001a63a6b54
--- /dev/null
+++ b/include/dt-bindings/clock/ingenic,x1600-cgu.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * This header provides clock numbers for the ingenic,x1600-cgu DT binding.
+ *
+ * They are roughly ordered as:
+ * - external clocks
+ * - PLLs
+ * - muxes/dividers in the order they appear in the x1600 programmers manual
+ * - gates in order of their bit in the CLKGR* registers
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_X1600_CGU_H__
+#define __DT_BINDINGS_CLOCK_X1600_CGU_H__
+
+/*
+ * beware of unwritten rules:
+ * - list must start with 0
+ * - list must not have "holes"
+ * - all clock parents must have lower number than a clock itself so that
+ * parents are initialized before
+ */
+
+#define X1600_CLK_EXCLK 0
+#define X1600_CLK_RTCLK 1
+#define X1600_CLK_12M 2
+#define X1600_CLK_APLL 3
+#define X1600_CLK_EPLL 4
+#define X1600_CLK_MPLL 5
+#define X1600_CLK_SCLKA 6
+#define X1600_CLK_CPUMUX 7
+#define X1600_CLK_CPU 8
+#define X1600_CLK_L2CACHE 9
+#define X1600_CLK_AHB0 10
+#define X1600_CLK_AHB2PMUX 11
+#define X1600_CLK_AHB2 12
+#define X1600_CLK_PCLK 13
+#define X1600_CLK_DDR 14
+#define X1600_CLK_I2S0 15
+#define X1600_CLK_I2S1 16
+#define X1600_CLK_LCDPIXCLK 17
+#define X1600_CLK_MAC 18
+#define X1600_CLK_MSC0 19
+#define X1600_CLK_MSC1 20
+#define X1600_CLK_SSI0 21
+#define X1600_CLK_CIMMCLK 22
+#define X1600_CLK_EXCLK_DIV512 23
+#define X1600_CLK_RTC 24
+#define X1600_CLK_OTGPHY 25
+#define X1600_CLK_NEMC 26
+#define X1600_CLK_OTG0 27
+#define X1600_CLK_SMB0 28
+#define X1600_CLK_SMB1 29
+#define X1600_CLK_AIC 30
+#define X1600_CLK_SADC 31
+#define X1600_CLK_UART0 32
+#define X1600_CLK_UART1 33
+#define X1600_CLK_UART2 34
+#define X1600_CLK_UART3 35
+#define X1600_CLK_PDMA 36
+#define X1600_CLK_AES 37
+#define X1600_CLK_I2S0_RX 38
+#define X1600_CLK_I2S0_TX 39
+
+#endif /* __DT_BINDINGS_CLOCK_X1600_CGU_H__ */
--
2.56.0