[PATCH 2/6] MIPS: Ingenic: Add and update PRIDs for XBurst II R0 and R2

[H. Nikolaus Schaller]

Add support for XBurst®1 and XBurst®2 architectures featuring the
MXU3.0 SIMD ISA, which are used in Ingenic/Lumissil MPU series.

The PRID table is updated based on Programming Manuals and hardware:
- jz4780: 0x3ee1024f (confirmed on CI20 board)
- x1000:  0x2ed1024f (unconfirmed)
- x1600:  0x00d00000 (confirmed on LX16 board)
- X1830:  0x00d00100 (unconfirmed)
- X2000:  0x00132000 (read out from LX20 board)
- X2600:  0x001320xx (confirmed 0x00132000 on LX26 board)

Additionally, clean up extra spaces in the comments for
PRID_IMP_XBURST_REV2 and PRID_IMP_XBURST2.

Note: PRID_IMP_XBURST2_R2 is imported from the vendor kernel and
is assumed to be used by the Ingenic A1 SoC family because of the
SIMD512 instruction set (MXU 3.0).

Co-developed-by: Paul Boddie <paul@xxxxxxxxxxxxx>
Signed-off-by: Paul Boddie <paul@xxxxxxxxxxxxx>
Signed-off-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx>
---
 arch/mips/include/asm/cpu.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 0fd9f9bbd21f1..1b88966116ffa 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -47,7 +47,7 @@
 #define PRID_COMP_CAVIUM	0x0d0000
 #define PRID_COMP_LOONGSON	0x140000
 #define PRID_COMP_INGENIC_13	0x130000	/* X2000, X2100 */
-#define PRID_COMP_INGENIC_D0	0xd00000	/* JZ4730, JZ4740, JZ4750, JZ4755, JZ4760, X1830 */
+#define PRID_COMP_INGENIC_D0	0xd00000	/* JZ4730, JZ4740, JZ4750, JZ4755, JZ4760, X1830, X1600 */
 #define PRID_COMP_INGENIC_D1	0xd10000	/* JZ4770, JZ4775, X1000 */
 #define PRID_COMP_INGENIC_E1	0xe10000	/* JZ4780 */
 
@@ -186,9 +186,11 @@
  * These are the PRID's for when 23:16 == PRID_COMP_INGENIC_*
  */
 
+#define PRID_IMP_XBURST		0x0000	/* XBurst®1 with ISA */
 #define PRID_IMP_XBURST_REV1	0x0200	/* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA	*/
-#define PRID_IMP_XBURST_REV2	0x0100	/* XBurst®1 with MXU2.0 SIMD ISA		*/
-#define PRID_IMP_XBURST2		0x2000	/* XBurst®2 with MXU2.1 SIMD ISA		*/
+#define PRID_IMP_XBURST_REV2	0x0100	/* XBurst®1 with MXU2.0 SIMD ISA */
+#define PRID_IMP_XBURST2	0x2000	/* XBurst®2 with MXU2.1 SIMD ISA */
+#define PRID_IMP_XBURST2_R2	0x2100	/* XBurst®2 with MXU3.0 SIMD ISA */
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_NETLOGIC
-- 
2.56.0