[PATCH 0/4] arm64: amlogic: S4 CPU frequency scaling

[christian . koever-draxl]

From: Christian Stefan Kövér-Draxl <ckoever@xxxxxxxxxx>

S4 keeps its CPU clock registers in the secure world and bins its parts
by voltage, so CPU DVFS needs three pieces:

 1-2: the CPU clock in the S4 PLL controller, driven through the two
      BL31 SMC services the firmware exposes (sys_pll and the CPU clock
      tree), modelled as one clock because the firmware calls do not
      map onto separate muxes and dividers;
 3:   the secure monitor call that returns the CPU speed bin;
 4:   a small cpufreq driver that picks the "opp-microvolt-speed<bin>"
      curve and registers cpufreq-dt, like sun50i-cpufreq-nvmem.

This applies on top of "firmware: meson: sm: make power-off work on
S4" (sent separately; the command tables overlap). The patches touch
clk, firmware/meson and cpufreq. Patch 4 depends on patch 3; 1-2 are
independent of 3-4. I am happy to split them if the maintainers prefer
to take them through their trees separately.

Tested on an S905W2 (speed bin 2): 100 MHz to 1.908 GHz with the
vendor voltages, transitions under load for hours, vddcpu follows the
table.

Tool use (Documentation/process/generated-content.rst):
This work was done with the help of an AI coding assistant, Claude
(Anthropic), used through Claude Code over many sessions. It did a large
part of the hands-on work: it read the vendor kernel and the firmware
interfaces, probed registers on the board, drafted the code and the
changelogs, and ran the builds, checkpatch, dt_binding_check and the
tests on the hardware. I directed the work, reviewed every change and
the final patches, and take responsibility for them. There is no single
prompt to quote; the sessions were of the form "find out why X fails on
this board, fix it, test it on the box".

Tested on an Amediatech X98Q TV box (Amlogic S905W2, S4 family, 2 GiB),
vendor U-Boot and BL31/OP-TEE, Linux 7.3 plus this work.

Christian Stefan Kövér-Draxl (4):
  dt-bindings: clock: amlogic,s4-pll-clkc: add the CPU clock
  clk: meson: s4-pll: add the CPU clock
  firmware: meson: sm: add the CPU speed bin call
  cpufreq: add an Amlogic speed-bin driver

 MAINTAINERS                                   |   1 +
 drivers/clk/meson/s4-pll.c                    | 320 ++++++++++++++++++
 drivers/cpufreq/Kconfig.arm                   |  14 +
 drivers/cpufreq/Makefile                      |   1 +
 drivers/cpufreq/amlogic-cpufreq.c             | 184 ++++++++++
 drivers/cpufreq/cpufreq-dt-platdev.c          |   2 +
 drivers/firmware/meson/meson_sm.c             |   1 +
 .../dt-bindings/clock/amlogic,s4-pll-clkc.h   |   1 +
 include/linux/firmware/meson/meson_sm.h       |   1 +
 9 files changed, 525 insertions(+)
 create mode 100644 drivers/cpufreq/amlogic-cpufreq.c


base-commit: 7be4bc52fd9e0e55dc9a2e0232b89427d2c4b614
prerequisite-patch-id: f977117cf7f3a613f667c2106e7f4aafc0ace116
prerequisite-patch-id: 1ec4e1bb456bd13cec4f140219f700f44ea19606
-- 
2.56.0