[PATCH] arm64: dts: imx952-frdm: support AONMIX MQS

From: shengjiu . wang

Date: Mon Oct 26 2026 - 04:50:39 EST


From: Shengjiu Wang <shengjiu.wang@xxxxxxx>

Add support for AONMIX MQS (i.e. MQS1).

Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
---
.../arm64/boot/dts/freescale/imx952-frdm.dtsi | 77 +++++++++++++++++++
1 file changed, 77 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx952-frdm.dtsi b/arch/arm64/boot/dts/freescale/imx952-frdm.dtsi
index 7785eb1a68fc..750046e1a5c4 100644
--- a/arch/arm64/boot/dts/freescale/imx952-frdm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx952-frdm.dtsi
@@ -222,6 +222,12 @@ cpu {
};
};

+ sound-mqs {
+ compatible = "audio-graph-card2";
+ label = "mqs-audio";
+ links = <&sai1_port1>;
+ };
+
usdhc3_pwrseq: usdhc3-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pcal6416 8 GPIO_ACTIVE_LOW>;
@@ -390,6 +396,70 @@ &micfil {
status = "okay";
};

+&mqs1 {
+ clocks = <&scmi_clk IMX952_CLK_SAI1>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ pinctrl-0 = <&pinctrl_mqs1>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ mqs1_port: port {
+ playback-only;
+
+ mqs1_endpoint: endpoint {
+ dai-format = "left_j";
+ remote-endpoint = <&sai1_endpoint1>;
+ };
+ };
+};
+
+&sai1 {
+ clocks = <&scmi_clk IMX952_CLK_BUSAON>, <&clk_dummy>,
+ <&scmi_clk IMX952_CLK_SAI1>, <&clk_dummy>,
+ <&clk_dummy>, <&scmi_clk IMX952_CLK_AUDIOPLL1>,
+ <&scmi_clk IMX952_CLK_AUDIOPLL2>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
+ assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
+ <&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
+ <&scmi_clk IMX952_CLK_AUDIOPLL1>,
+ <&scmi_clk IMX952_CLK_AUDIOPLL2>,
+ <&scmi_clk IMX952_CLK_SAI1>;
+ assigned-clock-parents = <0>, <0>, <0>, <0>,
+ <&scmi_clk IMX952_CLK_AUDIOPLL1>;
+ assigned-clock-rates = <3932160000>, <3612672000>,
+ <393216000>, <361267200>, <24576000>;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* leave unconnected - no RX in the context of MQS */
+ port@0 {
+ reg = <0>;
+
+ endpoint {
+ };
+ };
+
+ sai1_port1: port@1 {
+ reg = <1>;
+ mclk-fs = <512>;
+ playback-only;
+
+ sai1_endpoint1: endpoint {
+ bitclock-master;
+ dai-format = "left_j";
+ frame-master;
+ remote-endpoint = <&mqs1_endpoint>;
+ system-clock-direction-out;
+ };
+ };
+ };
+};
+
&sai5 {
assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
@@ -443,6 +513,13 @@ IMX952_PAD_GPIO_IO11__WAKEUPMIX_TOP_LPSPI3_SCK 0x39e
>;
};

+ pinctrl_mqs1: mqs1grp {
+ fsl,pins = <
+ IMX952_PAD_SAI1_TXFS__AONMIX_TOP_MQS1_LEFT 0x31e
+ IMX952_PAD_SAI1_RXD0__AONMIX_TOP_MQS1_RIGHT 0x31e
+ >;
+ };
+
pinctrl_pcal6416: pcal6416grp {
fsl,pins = <
IMX952_PAD_GPIO_IO34__WAKEUPMIX_TOP_GPIO5_IO_14 0x31e
--
2.34.1