Re: [PATCH 1/2] dt-bindings: clock: qcom: Document the SM7250 display clock controller

[Krzysztof Kozlowski]

On Fri, Oct 23, 2026 at 03:48:24PM +0530, Ishu Brar wrote:
> Add the binding and the header with the clock, reset and GDSC indices
> for the display clock controller (DISPCC) of the Qualcomm SM7250 SoC
> (Snapdragon 765/765G/768G).
> 
> The header and the binding are derived from the SM7150 ones: the register
> layout is the same, but the controller takes GPLL0 from the GCC as an
> extra parent and has its own PLL.
> 
> Assisted-by: Claude

Same comments.

Best regards,
Krzysztof