Re: [PATCH 4/4] cpufreq: add an Amlogic speed-bin driver
From: Christain Stefan Köver-Draxl
Date: Mon Oct 26 2026 - 06:15:14 EST
Hi Viresh,
Hi Jerome,
On 10/26/26 09:57, Jerome Brunet wrote:
On lun. 26 oct. 2026 at 11:00, Viresh Kumar <viresh.kumar@xxxxxxxxxx> wrote:
On 25-10-26, 20:22, christian.koever-draxl@xxxxxxxxxxxxxxxxxx wrote:I would advise to wait a little for Amlogic to chime in.
From: Christian Stefan Kövér-Draxl <ckoever@xxxxxxxxxx>Is it safe to apply just this one ? I can take this via the PM tree then.
Every S4 speed bin runs the same CPU frequencies but needs its own
voltage curve, and the bin can only be read through the secure monitor.
Read the bin from the firmware, select the matching
"opp-microvolt-speed<bin>" property for all CPUs, then register
cpufreq-dt. Bins outside the known range fall back to bin 0, which
has the highest voltages. Like sun50i-cpufreq-nvmem, the driver binds
on the SoC compatible and needs no node of its own, and S4 is added to
the cpufreq-dt-platdev blocklist so cpufreq-dt is only created after
the bin has been applied.
Signed-off-by: Christian Stefan Kövér-Draxl <ckoever@xxxxxxxxxx>
---
MAINTAINERS | 1 +
drivers/cpufreq/Kconfig.arm | 14 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/amlogic-cpufreq.c | 184 +++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
5 files changed, 202 insertions(+)
create mode 100644 drivers/cpufreq/amlogic-cpufreq.c
Patch 2 is something I already rejected back when S4 support was
initially introduced. I suppose AI just unearthed it and did not bother
to mention it.
Amlogic was supposed to migrate to SCMI at that point, and possibly
handle CPU frequency scaling through the secure fw entirely.
They did on later SoCs, I don't know where their FW stands on the S4.
In my board's firmware there is no SCMI. CPU DVFS only works through the clock SMCs.
Best regards,
Christian
--
viresh