Re: [PATCH v3 8/8] iio: adc: rzt2h: Add support for RZ/V2H(P) SoC

[Andy Shevchenko]

On Mon, Oct 26, 2026 at 11:14:53AM +0100, Geert Uytterhoeven wrote:
> On Sat, 24 Oct 2026 at 12:38, Andy Shevchenko
> <andriy.shevchenko@xxxxxxxxx> wrote:
> > On Fri, Oct 23, 2026 at 06:59:19PM +0100, Prabhakar wrote:

...

> > > +static int rzt2h_adc_write_scale(struct iio_dev *indio_dev,
> > > +                              struct iio_chan_spec const *chan,
> > > +                              int val, int val2)
> > > +{
> > > +     struct rzt2h_adc *adc = iio_priv(indio_dev);
> > > +     u64 req_scale, scale;
> > > +     unsigned int i;
> > > +
> > > +     if (!(adc->chip_info->features & RZT2H_ADC_FEATURE_RES_SELECT))
> > > +             return -EINVAL;
> > > +
> > > +     req_scale = mul_u32_u32(val, NANO) + val2;
> >
> > But what's wrong with the simple 1ULL * val * NANO?
> 
> IMO that looks like a useless multiplication, which will be removed
> again in some future "cleanup"...
> 
> There is a reason the mul_u32_u32() helper exists...

I don't see that. The 9e3d6223d209 ("math64, timers: Fix 32bit
mul_u64_u32_shr() and friends") tells a different story.

> > > +     for (i = 0; i < chan->num_ext_scan_type; i++) {
> > > +             scale = mul_u32_u32(RZT2H_ADC_VREF_mV, NANO) >>
> >
> > Similar Q.

-- 
With Best Regards,
Andy Shevchenko