[PATCH v2 02/12] dt-bindings: clock: qcom: Add PDM XO4 divider clock IDs
From: Taniya Das
Date: Mon Oct 26 2026 - 07:36:10 EST
Add clock IDs for the PDM XO4 divider sources on QCS615, QCS8300,
SA8775P, and SC7280. The corresponding GCC drivers use these IDs to
register the divider clocks.
Signed-off-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
---
include/dt-bindings/clock/qcom,gcc-sc7280.h | 1 +
include/dt-bindings/clock/qcom,qcs615-gcc.h | 2 ++
include/dt-bindings/clock/qcom,qcs8300-gcc.h | 1 +
include/dt-bindings/clock/qcom,sa8775p-gcc.h | 1 +
4 files changed, 5 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,gcc-sc7280.h b/include/dt-bindings/clock/qcom,gcc-sc7280.h
index 3d5724b79bff18a858bdbb5c1654c5174e8cb23b..68dfd6616ce4b1c1e41f11603be639685301129f 100644
--- a/include/dt-bindings/clock/qcom,gcc-sc7280.h
+++ b/include/dt-bindings/clock/qcom,gcc-sc7280.h
@@ -192,6 +192,7 @@
#define GCC_WPSS_RSCP_CLK 182
#define GCC_EDP_CLKREF_EN 183
#define GCC_SEC_CTRL_CLK_SRC 184
+#define GCC_PDM_XO4_DIV_CLK_SRC 185
/* GCC power domains */
#define GCC_PCIE_0_GDSC 0
diff --git a/include/dt-bindings/clock/qcom,qcs615-gcc.h b/include/dt-bindings/clock/qcom,qcs615-gcc.h
index 9704091636b87108a2a8c5ccc4a6b293829d8272..cddf21466a96a2990f1aaaf7c655fa6a4369ccbd 100644
--- a/include/dt-bindings/clock/qcom,qcs615-gcc.h
+++ b/include/dt-bindings/clock/qcom,qcs615-gcc.h
@@ -175,6 +175,8 @@
#define GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK 165
#define GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK 166
+#define GCC_PDM_XO4_DIV_CLK_SRC 167
+
/* GCC Resets */
#define GCC_EMAC_BCR 0
#define GCC_QUSB2PHY_PRIM_BCR 1
diff --git a/include/dt-bindings/clock/qcom,qcs8300-gcc.h b/include/dt-bindings/clock/qcom,qcs8300-gcc.h
index 3c674c7baaba91815b13450e647b41053bd7330d..cee26f50092044f4a0b4cead6f669f0ccf7343c0 100644
--- a/include/dt-bindings/clock/qcom,qcs8300-gcc.h
+++ b/include/dt-bindings/clock/qcom,qcs8300-gcc.h
@@ -196,6 +196,7 @@
#define GCC_TSCSS_CNTR_CLK_SRC 186
#define GCC_TSCSS_ETU_CLK 187
#define GCC_TSCSS_GLOBAL_CNTR_CLK 188
+#define GCC_PDM_XO4_DIV_CLK_SRC 189
/* GCC power domains */
#define GCC_EMAC0_GDSC 0
diff --git a/include/dt-bindings/clock/qcom,sa8775p-gcc.h b/include/dt-bindings/clock/qcom,sa8775p-gcc.h
index 01f54234963d6a531926103f8658307d4e0662f2..e101c9b565d650495e63f5f97b3458375d0e85ec 100644
--- a/include/dt-bindings/clock/qcom,sa8775p-gcc.h
+++ b/include/dt-bindings/clock/qcom,sa8775p-gcc.h
@@ -257,6 +257,7 @@
#define GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK 246
#define GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK 247
#define GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK 248
+#define GCC_PDM_XO4_DIV_CLK_SRC 249
/* GCC resets */
#define GCC_CAMERA_BCR 0
--
2.34.1