[PATCH 4/5] MIPS: tlbex: Follow the boot-time R10000 LL/SC choice

[Imre Kaloz]

The TLB handlers are generated after the boot-time R10000 LL/SC
choice. Emit the branch-likely in their ll/sc loop only when the
workaround is in use.

Signed-off-by: Imre Kaloz <kaloz@xxxxxxxxxx>
---
 arch/mips/mm/tlbex.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 69ea54bdc0c3..32ce99dc90a0 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -35,6 +35,7 @@
 #include <asm/mipsregs.h>
 #include <asm/mmu_context.h>
 #include <asm/regdef.h>
+#include <asm/r10k-llsc.h>
 #include <asm/uasm.h>
 #include <asm/setup.h>
 #include <asm/tlbex.h>
@@ -95,7 +96,7 @@ static inline int __maybe_unused bcm1250_m3_war(void)
 
 static inline int __maybe_unused r10000_llsc_war(void)
 {
-	return IS_ENABLED(CONFIG_WAR_R10000_LLSC);
+	return r10k_llsc_war;
 }
 
 static int use_bbit_insns(void)
-- 
2.47.3