[PATCH v4 1/2] dt-bindings: usb: Add Samsung Exynos8855 DWC3 controller
From: Selvarasu Ganesan
Date: Mon Oct 26 2026 - 09:58:06 EST
Add the Samsung Exynos8855 DWC3 binding using a flattened node
representation, where the DWC3 controller is directly addressable
rather than nested as a child node of a glue layer.
This is the first Samsung Exynos binding using the flattened
representation.
Co-developed-by: Muhammed Ali <muhammed.ali@xxxxxxxxxxx>
Signed-off-by: Muhammed Ali <muhammed.ali@xxxxxxxxxxx>
Signed-off-by: Selvarasu Ganesan <selvarasu.g@xxxxxxxxxxx>
---
.../bindings/usb/samsung,exynos8855-dwc3.yaml | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml
new file mode 100644
index 000000000000..664c26c1a9ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/samsung,exynos8855-dwc3.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/samsung,exynos8855-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos8855 DWC3 USB controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@xxxxxxxxxx>
+ - Selvarasu Ganesan <selvarasu.g@xxxxxxxxxxx>
+
+description:
+ Describes the DWC3 USB controller block implemented on the Samsung
+ Exynos8855 SoC.
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos8855-dwc3
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Reference clock for SOF/ITP generation.
+ - description: Bus (APB) clock for register access.
+
+ clock-names:
+ items:
+ - const: ref
+ - const: bus
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+
+allOf:
+ - $ref: snps,dwc3-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb@13200000 {
+ compatible = "samsung,exynos8855-dwc3";
+ reg = <0x13200000 0x10000>;
+ clocks = <&usb_clk 0>,
+ <&usb_clk 1>;
+ clock-names = "ref", "bus";
+ interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "peripheral";
+ phys = <&usbdrd_phy 0>;
+ phy-names = "usb2-phy";
+ snps,quirk-frame-length-adjustment = <0x20>;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,gfladj-refclk-lpm-sel-quirk;
+ };
+...
--
2.17.1