Re: [RFC PATCH] ASoC: es8375: make register initialization fallible

[Mark Brown]

> ES8375 initialization and bias transitions discard register access
> errors. Component probe can therefore succeed after partial
> initialization, and resume cannot distinguish an invalid reset-state
> read from a valid state.

> --- a/sound/soc/codecs/es8375.c
> +++ b/sound/soc/codecs/es8375.c
> @@ -455,12 +455,19 @@ static int es8375_set_bias_level(struct snd_soc_component *component,
>  			dev_err(component->dev, "unable to prepare mclk\n");
>  			return  ret;
>  		}
> -		regmap_write(es8375->regmap, ES8375_CSM1, 0xA6);
> +		ret = regmap_write(es8375->regmap, ES8375_CSM1, 0xA6);
> +		if (ret) {
> +			clk_disable_unprepare(es8375->mclk);
> +			return ret;
> +		}

This needs a bit more thought.  When we transition back to STANDBY
we'll disable the clock if the register write works, but we already
disabled it here.  Of course if one write failed the other one is likely
to also fail so we might not reach the clock disable so it might all be
moot, but we're adding code and building on top of an existing confusion
here.

-- 
Mark Brown <broonie@xxxxxxxxxx>