Re: [PATCH v2 1/6] drm/msm/dpu: reset unassigned resource slots to NULL on topology update

[Xi Zhang]

On Mon, Oct 26, 2026 at 8:04 PM Val Packett <val@xxxxxxxxxxxx> wrote:
>
>
> On 10/26/26 5:25 PM, Xi Zhang wrote:
> > While this is not currently the case, it may be possible that topology
> > for cwb and dsc resource requirements change between mode set in the
> > future.
> >
> > e.g. when dsc support is added to DisplayPort, dsc may be optionally
> > enabled and disabled between different modes due to
> > bandwidth requirements.
> >
> > Set unassigned resource slots to NULL on topology update to avoid
> > issues in the future. It's good practice to do so anyway.
> >
> > Signed-off-by: Xi Zhang <xz.ca.cn@xxxxxxxxx>
> > ---
> >   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 22 +++++++++++++++-------
> >   1 file changed, 15 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > index 0a6be69a3e83..8d2b4d2726f2 100644
> > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> > @@ -1205,9 +1205,13 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
> >                                                      ARRAY_SIZE(hw_pp));
> >       }
> >
> > -     for (i = 0; i < num_cwb; i++) {
> > -             dpu_enc->hw_cwb[i] = to_dpu_hw_cwb(hw_cwb[i]);
> > -             cwb_mask |= BIT(dpu_enc->hw_cwb[i]->idx - CWB_0);
> > +     for (i = 0; i < ARRAY_SIZE(dpu_enc->hw_cwb); i++) {
> > +             if (i < num_cwb) {
> > +                     dpu_enc->hw_cwb[i] = to_dpu_hw_cwb(hw_cwb[i]);
> > +                     cwb_mask |= BIT(dpu_enc->hw_cwb[i]->idx - CWB_0);
> > +             } else {
> > +                     dpu_enc->hw_cwb[i] = NULL;
> > +             }
> > [..]
>
> I've mentioned in a reply to v1 that this was indeed affected by the DSC
> changes in radxa's WIP, but missed the more relevant one:
>
> This is already handled by the "drm/msm: fix SMMU fault dumps" series:
>
> https://lore.kernel.org/all/20261024-fd-kms-fix-smmu-v5-0-a5b0b284aead@xxxxxxxxxxxxxxxx/
>
> Namely patches 5-8 ("drm/msm/dpu: clear the ... blocks ...")
>
> Thanks,
> ~val
>

Thank you for the reference link!

Also thanks for the radxa mention. I have some msm/dp dsc work
for the older v7.2 kernel and could use those code reference.

Awaiting comments before removing the overlapping patches
(1 and 5 of this series) which have more complete fixes in the
series you linked. There may be other issues with my series that
sashiko bot didn't find.

(I'm using the gmail web interface reply-all, hope it's doing the right thing.)