Re: [PATCH 3/3] arm64: dts: qcom: lemans: Add Draco EVK board
From: Gopikishan Thawre
Date: Tue Oct 27 2026 - 04:29:10 EST
On 10/19/2026 5:35 PM, Dmitry Baryshkov wrote:
On Mon, Oct 19, 2026 at 03:57:34PM +0530, Gopikishan Thawre wrote:
Add the device tree for the LeMans Draco EVK platform which combines
the LeMans Draco EVK SoM and Draco carrier board.
This device tree adds board-specific peripheral configuration on top
of the SoM, including:
- I2C GPIO expanders (TCA6416/PCA9534) on i2c2 and i2c18
- EEPROM with MAC address nvmem layout on i2c18
- Native DisplayPort output (DP0-DP3)
- Dual Ethernet (ethernet0/ethernet1) with HSGMII PHY over SerDes
- ST33HTPM TPM over SPI16
- AMC6821 fan controller on i2c4
Co-developed-by: Vishnu Saini <vishnu.saini@xxxxxxxxxxxxxxxx>
Signed-off-by: Vishnu Saini <vishnu.saini@xxxxxxxxxxxxxxxx>
Co-developed-by: Khalid Faisal Ansari <khalid.ansari@xxxxxxxxxxxxxxxx>
Signed-off-by: Khalid Faisal Ansari <khalid.ansari@xxxxxxxxxxxxxxxx>
Co-developed-by: Ajinkya Inchure <ainchure@xxxxxxxxxxxxxxxx>
Signed-off-by: Ajinkya Inchure <ainchure@xxxxxxxxxxxxxxxx>
Co-developed-by: Anuj Tripathi <anuj.tripathi@xxxxxxxxxxxxxxxx>
Signed-off-by: Anuj Tripathi <anuj.tripathi@xxxxxxxxxxxxxxxx>
Signed-off-by: Gopikishan Thawre <gopikishan.thawre@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/Makefile | 5 +
arch/arm64/boot/dts/qcom/lemans-draco-evk.dts | 543 ++++++++++++++++++++++++++
2 files changed, 548 insertions(+)
+
+&i2c2 {
+ status = "okay";
+
+ expander0: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander1: gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander2: gpio@22 {
+ compatible = "ti,tca6416";
+ reg = <0x22>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander3: gpio@23 {
+ compatible = "ti,tca6416";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander4: gpio@38 {
+ compatible = "nxp,pca9534";
+ reg = <0x38>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+};
+
+&tlmm {
Please make sure to sort your DT file. You have 'tlmm' node between
'i2c2' and 'i2c18'.
+
+ dp2_hot_plug_det: dp2-hot-plug-det-state {
+ pins = "gpio104";
+ function = "edp2_hot";
+ bias-disable;
+ };
+
+ dp3_hot_plug_det: dp3-hot-plug-det-state {
+ pins = "gpio103";
+ function = "edp3_hot";
+ bias-disable;
+ };
+
+ ethernet0_default: ethernet0-default-state {
+ ethernet0_mdc: ethernet0-mdc-pins {
+ pins = "gpio8";
+ function = "emac0_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet0_mdio: ethernet0-mdio-pins {
+ pins = "gpio9";
+ function = "emac0_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ ethernet1_default: ethernet1-default-state {
+ ethernet1_mdc: ethernet1-mdc-pins {
+ pins = "gpio20";
+ function = "emac1_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet1_mdio: ethernet1-mdio-pins {
+ pins = "gpio21";
+ function = "emac1_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+};
+
+&i2c18 {
+ status = "okay";
+
+ expander5: gpio@3c {
+ compatible = "nxp,pca9534";
+ reg = <0x3c>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ eeprom@50 {
+ compatible = "giantec,gt24c256c", "atmel,24c256";
+ reg = <0x50>;
+ pagesize = <64>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_addr0: mac-addr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ mac_addr1: mac-addr@6 {
+ reg = <0x6 0x6>;
+ };
+ };
+ };
+};
+
+&i2c4 {
More of the nodes in the wrong order. Please go through the whole file.
Thanks for the review. The entire DT file will be sorted alphabetically
in v2.
Best regards,
Gopikishan
+ status = "okay";
+
+ fan_controller: fan@1a {
+ compatible = "ti,amc6821";
+ reg = <0x1a>;
+ #pwm-cells = <2>;
+
+ fan {
+ pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
+ };
+ };
+};
+