Re: [PATCH] soc: qcom: ubwc: Add SM7250 configuration

[Abel Vesa]

On 26-10-27 11:49:31, Ishu Brar wrote:
> Add the UBWC configuration of the Qualcomm SM7250 SoC (Snapdragon
> 765/765G/768G): UBWC encoder version 3.0 with highest bank bit 14.
> 
> The downstream GPU devicetree of the platform sets qcom,ubwc-mode to 3
> (UBWC 3.0) and a highest bank bit of 14, the downstream GPU driver does
> not enable the 8-channel macrotile mode of UBWC 3.1, and the downstream
> display devicetree also gives UBWC 3.0. No existing entry has UBWC 3.0
> with this bank bit, so add one.
> 
> Without an entry, the Adreno and DPU drivers fail to probe on SM7250,
> because qcom_ubwc_config_get_data() returns an error.
> 
> Signed-off-by: Ishu Brar <patches@xxxxxxx>

Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>