Re: [PATCH v4 2/5] drm/msm/a6xx: Program the PDC sequencer on Adreno 620

[Konrad Dybcio]

On 10/27/26 8:14 AM, Ishu Brar via B4 Relay wrote:
> From: Ishu Brar <patches@xxxxxxx>
> 
> Unlike the rest of the A650 family, the A620 does not get its PDC set up
> by AOP (the downstream devicetree has no pdc_in_aop for it). Without the
> sequence, the RSC never acks the second power-up ("Unable to power on
> the GPU RSC") and the device hangs.
> 
> Program the sequence from the driver, taking the xo, mx and cx resource
> addresses from cmd-db instead of the hardcoded ones. Like the downstream
> driver, also program the VRM command when cmd-db has a vrm.soc resource.
> Add adreno_is_a620() for the selection.
> 
> Signed-off-by: Ishu Brar <patches@xxxxxxx>
> ---
>  drivers/gpu/drm/msm/adreno/a6xx_gmu.c   | 35 +++++++++++++++++++++++++++------
>  drivers/gpu/drm/msm/adreno/adreno_gpu.h |  5 +++++
>  2 files changed, 34 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index 662f09bec9d5..8d426f1f127e 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -686,6 +686,7 @@ static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu)
>  	u32 seqmem0_drv0_reg = REG_A6XX_RSCC_SEQ_MEM_0_DRV0;
>  	void __iomem *seqptr = NULL;
>  	uint32_t pdc_address_offset;
> +	u32 mx_addr = 0x30010, cx_addr = 0x30000, vrm_addr = 0;

We should grab these form cmd_db unconditionally, so:

u32 cx_addr = cmd_db..
u32 mx_addr = cmd_db..

etc.

>  	void __iomem *pdcptr;
>  	bool pdc_in_aop = false;
>  
> @@ -697,8 +698,18 @@ static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu)
>  	if (IS_ERR(pdcptr))
>  		return;
>  
> -	if (adreno_is_a650_family(adreno_gpu) ||
> -	    adreno_is_a7xx(adreno_gpu))
> +	/* Unlike the rest of the A650 family, A620 has no PDC setup from AOP */
> +	if (adreno_is_a620(adreno_gpu)) {
> +		pdc_address_offset = cmd_db_read_addr("xo.lvl");
> +		mx_addr = cmd_db_read_addr("mx.lvl");
> +		cx_addr = cmd_db_read_addr("cx.lvl");
> +		vrm_addr = cmd_db_read_addr("vrm.soc");

but keep assigning vrm.addr here, as kgsl only ever writes there
on A620, but the cmd_db lookup will succeed on other SoCs too

Konrad