Re: [PATCH 13/24] serial: 8250: dfl: validate MMIO resource size and regshift

[Andy Shevchenko]

On Tue, Oct 27, 2026 at 12:06:39PM +0100, Greg Kroah-Hartman wrote:

> The driver passes the DFL feature's raw MMIO resource to the 8250 core
> without verifying that the resource covers the full UART register
> window.  Add a regshift sanity check and validate that the MMIO resource
> is large enough for 8250 register accesses up to register 7 at the
> configured register spacing and access width.

Same comment as per previous patch. Take the bar size, take all data from FPGA,
validate against given limits.

-- 
With Best Regards,
Andy Shevchenko