Re: [PATCH v3] media: qcom: camss: Don't reject sensor links faster than 4x the CSIPHY timer

[Loic Poulain]

On Tue, Oct 27, 2026 at 5:15 PM David Heidelberg via B4 Relay
<devnull+david.ixit.cz@xxxxxxxxxx> wrote:
>
> From: David Heidelberg <david@xxxxxxx>
>
> The timer clock has no such relationship to the link rate. Both the 2ph
> and 3ph code use it only as the reference for csiphy_settle_cnt_calc(),
> where a faster link makes the settle count smaller, not larger: at
> 269.33 MHz the count converges to 16 as the link rate grows. The vendor
> driver pins the timer to 269.33 MHz for every sensor (it is the highest
> rate in the SDM845 clock plan) and streams this exact link with it.
>
> Clamp to the highest listed rate instead of failing, the same way the
> unknown-link-rate case is already handled.
>
> Solves issue on sdm845 that caps the link at ~1.02 GHz,
> so the Samsung S5K2X7SP, ~2.3 Gbps/lane, link 1.15 GHz) fails with
> Pixel clock is too high for CSIPHY
>
> Fixes: bbde31047434 ("media: camss: Use optimal clock frequency rates")
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
> Signed-off-by: David Heidelberg <david@xxxxxxx>

Reviewed-by: Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>

> ---
> Tested on SHIFT 6MQ with sdm845-next-20260820-9.
> ---
> Changes in v3:
> - Added R-b and Fixes: tag.
> - Link to v2: https://patch.msgid.link/20260914-csiphy-sdm845-limits-v2-1-622db5a6ebf0@xxxxxxx
>
> Changes in v2:
> - Drop the camcc change entirely; the 269.33 MHz ceiling stands. (Konrad)
> - Fix the check in camss instead: clamp the timer clock to the highest
>   listed rate rather than failing, matching the vendor driver.
> - Link to v1: https://patch.msgid.link/20260822-csiphy-sdm845-limits-v1-1-d360bf7cd38f@xxxxxxx
> ---
>  drivers/media/platform/qcom/camss/camss-csiphy.c | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c
> index f99eea2ef2289..985171276ce47 100644
> --- a/drivers/media/platform/qcom/camss/camss-csiphy.c
> +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c
> @@ -159,25 +159,23 @@ static int csiphy_set_clock_rates_legacy(struct csiphy_device *csiphy)
>                         long round_rate;
>
>                         camss_add_clock_margin(&min_rate);
>
>                         for (j = 0; j < clock->nfreqs; j++)
>                                 if (min_rate < clock->freq[j])
>                                         break;
>
> -                       if (j == clock->nfreqs) {
> -                               dev_err(dev,
> -                                       "Pixel clock is too high for CSIPHY\n");
> -                               return -EINVAL;
> -                       }
> -
> -                       /* if sensor pixel clock is not available */
> -                       /* set highest possible CSIPHY clock rate */
> -                       if (min_rate == 0)
> +                       /*
> +                        * The timer clock is only the reference for the
> +                        * settle count and does not need to track the link
> +                        * rate. Use the highest listed rate when the link is
> +                        * faster than the table covers or unknown.`
> +                        */
> +                       if (j == clock->nfreqs || min_rate == 0)
>                                 j = clock->nfreqs - 1;
>
>                         round_rate = clk_round_rate(clock->clk, clock->freq[j]);
>                         if (round_rate < 0) {
>                                 dev_err(dev, "clk round rate failed: %ld\n",
>                                         round_rate);
>                                 return -EINVAL;
>                         }
>
> ---
> base-commit: 151a134a4e6ec66f69db8750c66006f5207f7a9d
> change-id: 20260822-csiphy-sdm845-limits-b1e3dbaf5d38
>
> Best regards,
> --
> David Heidelberg <david@xxxxxxx>
>
>