[PATCH] arm64: dts: qcom: monaco-monza-som: Add ADC thermal channels

[Loic Poulain]

Add ADC5 GEN3 thermistor channels to pmm8620au_0 and pmm8650au_1 ADC
nodes for thermal monitoring on the Monaco Monza SoM:

- pmm8620au_0: XO, UFS/eMMC, and SoC thermistors (AMUX1, AMUX5, AMUX6)
- pmm8650au_1: SDRAM thermistor (AMUX6)

All channels use 100K pull-up.

Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>
---
 arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi | 40 ++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
index 36af1ad2105d5b3e5674fa59f5648c77ccfe7d11..dc2ef7e5b061354eca4e4fee90906e205ccac1a4 100644
--- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi
@@ -227,6 +227,46 @@ &pcie1_phy {
 	status = "okay";
 };
 
+&pmm8620au_0_adc {
+	channel@44 {
+		reg = <ADC5_GEN3_AMUX1_THM_100K_PU(0)>;
+		label = "pmm8620au_0_xo_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+		qcom,adc-tm;
+	};
+
+	channel@48 {
+		reg = <ADC5_GEN3_AMUX5_THM_100K_PU(0)>;
+		label = "pmm8620au_0_ufs_emmc_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+		qcom,adc-tm;
+	};
+
+	channel@49 {
+		reg = <ADC5_GEN3_AMUX6_THM_100K_PU(0)>;
+		label = "pmm8620au_0_soc_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+		qcom,adc-tm;
+	};
+};
+
+&pmm8650au_1_adc {
+	channel@249 {
+		reg = <ADC5_GEN3_AMUX6_THM_100K_PU(2)>;
+		label = "pmm8620au_1_sdram_therm";
+		qcom,ratiometric;
+		qcom,hw-settle-time = <200>;
+		qcom,pre-scaling = <1 1>;
+		qcom,adc-tm;
+	};
+};
+
 &qupv3_id_0 {
 	firmware-name = "qcom/qcs8300/qupv3fw.elf";
 

---
base-commit: f1ac44c32cba88ad65dcecd4a279661d14e93651
change-id: 20261028-monza-therm-44fbef42f89b

Best regards,
-- 
Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>