[PATCH v6 0/5] phy: Add the StarFive JH7110 Innosilicon HDMI PHY
From: Michal Wilczynski
Date: Wed Oct 28 2026 - 11:28:20 EST
This series adds the HDMI PHY driver for the StarFive JH7110 and shares
the pre-PLL code it has in common with the Rockchip RK3328 Innosilicon
HDMI PHY.
Up to v5 it was part of the JH7110 display series [1]. It is split out
as Vinod suggested, so it can go through linux-phy on its own; the rest
continues as v6 of "drm: starfive: jh7110: Enable display subsystem".
Nothing here depends on the display series. The display series depends
on this one: its HDMI subsystem binding references the PHY binding from
patch 1, and it needs the PHY driver at runtime.
[1] https://lore.kernel.org/all/20260929-jh7110-clean-send-v5-0-82b4d8e3c6c7@xxxxxxxxxxx/
The JH7110 has the same Innosilicon PHY as the RK3328, offset by 0x100
because it sits behind the HDMI controller in a shared register block.
Patch 2 factors out the pre-PLL config format, table lookup,
determine_rate, recalc_rate and the pre-PLL programming; patch 3 moves
Rockchip onto it; patch 4 adds the JH7110 driver. Pixel clock tables,
post-PLL and analog config stay SoC specific.
Patch 3 should be a no-op for Rockchip - same writes, same order, same
values - and RK3228, whose pre-PLL is at different addresses, keeps its
own register code and shares only the lookup. I have no Rockchip
hardware, so it is build tested only (arm and riscv). A Tested-by would
help.
Patch 5 adds a MAINTAINERS entry for the binding and the driver, as the
other JH7110 PHY drivers have.
Testing
=======
Tested on a VisionFive 2 v1.3B together with the display series, using
modetest: all 42 modes the sink advertises work, with pixel clocks from
25.175 MHz up to 297 MHz.
Every commit builds for riscv and arm.
Changes in v6:
- Split out of the JH7110 display series (Vinod)
- inno_read() returns the regmap_read() error and recalc_rate checks it,
instead of a failed read turning into a zero divisor (Vinod)
- Bound the pre-PLL and post-PLL table walks with the table size instead
of relying on a sentinel (Vinod)
- Lowercase hex in the JH7110 pixel clock table (Vinod)
- New patch 5: a MAINTAINERS entry for the JH7110 HDMI PHY, moved out of
the display series' entry
- Rebased onto v7.3, collected tags
- Link to v5: https://lore.kernel.org/all/20260929-jh7110-clean-send-v5-0-82b4d8e3c6c7@xxxxxxxxxxx/
---
Michal Wilczynski (5):
dt-bindings: phy: Add starfive,jh7110-inno-hdmi-phy
phy: Add common Innosilicon HDMI PHY helpers
phy: rockchip: inno-hdmi: Use the common Innosilicon PHY helpers
phy: starfive: Add jh7110-inno-hdmi-phy driver
MAINTAINERS: Add StarFive JH7110 HDMI PHY entry
.../phy/starfive,jh7110-inno-hdmi-phy.yaml | 49 ++
MAINTAINERS | 6 +
drivers/phy/Kconfig | 8 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-inno-hdmi.c | 358 +++++++++++++
drivers/phy/rockchip/Kconfig | 1 +
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 169 +-----
drivers/phy/starfive/Kconfig | 20 +
drivers/phy/starfive/Makefile | 1 +
drivers/phy/starfive/phy-jh7110-inno-hdmi.c | 587 +++++++++++++++++++++
include/linux/phy/inno-hdmi-phy.h | 88 +++
11 files changed, 1144 insertions(+), 144 deletions(-)
---
base-commit: c03c1a14507dfaf8b856c2608f9ac216021fc222
change-id: 20261028-jh7110-inno-hdmi-phy-83e5cfa643e3
Best regards,
--
Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>