Re: [PATCH v1 05/27] drm/panthor: Move register base offsets to the HW description

From: Liviu Dudau

Date: Wed Oct 28 2026 - 12:03:48 EST


On Tue, Sep 22, 2026 at 09:44:59PM +0100, Karunika Choo wrote:
> Mali v15 reorders several register regions, including GPU_CONTROL,
> MCU_CONTROL and PWR_CONTROL, so the driver can no longer assume a single
> fixed base layout across all supported GPUs.
>
> Add per-GPU register base offsets to the panthor hardware description
> and switch the GPU, FW and PWR local iomem setup to use those stored
> values. With the base addresses now owned by the hardware description,
> drop the corresponding fixed base-offset definitions from the register
> headers.
>
> This prepares the driver for GPUs with different register layouts
> without changing the existing behaviour on currently supported parts.
>
> Signed-off-by: Karunika Choo <karunika.choo@xxxxxxx>

Reviewed-by: Liviu Dudau <liviu.dudau@xxxxxxx>

Best regards,
Liviu

> ---
> v1:
> - rebased on drm-misc-next
> - use a generic panthor_hw_regbank structure for all register offsets.
>
> drivers/gpu/drm/panthor/panthor_fw.c | 2 +-
> drivers/gpu/drm/panthor/panthor_fw_regs.h | 2 --
> drivers/gpu/drm/panthor/panthor_gpu.c | 4 +--
> drivers/gpu/drm/panthor/panthor_gpu_regs.h | 2 --
> drivers/gpu/drm/panthor/panthor_hw.c | 23 +++++++++++++++--
> drivers/gpu/drm/panthor/panthor_hw.h | 29 ++++++++++++++++++++--
> drivers/gpu/drm/panthor/panthor_pwr.c | 2 +-
> drivers/gpu/drm/panthor/panthor_pwr_regs.h | 2 --
> 8 files changed, 52 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
> index 13efed3a2ea72..679ea1d233d53 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw.c
> +++ b/drivers/gpu/drm/panthor/panthor_fw.c
> @@ -1500,7 +1500,7 @@ int panthor_fw_init(struct panthor_device *ptdev)
> if (!fw)
> return -ENOMEM;
>
> - fw->iomem = ptdev->iomem + MCU_CONTROL_BASE;
> + fw->iomem = ptdev->iomem + ptdev->hw->regs.mcu_control.offset;
> ptdev->fw = fw;
> init_waitqueue_head(&fw->req_waitqueue);
> INIT_LIST_HEAD(&fw->sections);
> diff --git a/drivers/gpu/drm/panthor/panthor_fw_regs.h b/drivers/gpu/drm/panthor/panthor_fw_regs.h
> index b2e59cfc22b00..a3492f7f913f9 100644
> --- a/drivers/gpu/drm/panthor/panthor_fw_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_fw_regs.h
> @@ -4,8 +4,6 @@
> #ifndef __PANTHOR_FW_REGS_H__
> #define __PANTHOR_FW_REGS_H__
>
> -#define MCU_CONTROL_BASE 0x700
> -
> #define MCU_CONTROL 0x0
> #define MCU_CONTROL_ENABLE 1
> #define MCU_CONTROL_AUTO 2
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c
> index ade2646e2caf6..d6534fabc682e 100644
> --- a/drivers/gpu/drm/panthor/panthor_gpu.c
> +++ b/drivers/gpu/drm/panthor/panthor_gpu.c
> @@ -158,7 +158,7 @@ int panthor_gpu_init(struct panthor_device *ptdev)
> if (!gpu)
> return -ENOMEM;
>
> - gpu->iomem = ptdev->iomem + GPU_CONTROL_BASE;
> + gpu->iomem = ptdev->iomem + ptdev->hw->regs.gpu_control.offset;
> spin_lock_init(&gpu->reqs_lock);
> init_waitqueue_head(&gpu->reqs_acked);
> mutex_init(&gpu->cache_flush_lock);
> @@ -175,7 +175,7 @@ int panthor_gpu_init(struct panthor_device *ptdev)
> return irq;
>
> ret = panthor_irq_request(ptdev, &ptdev->gpu->irq, irq,
> - ptdev->iomem + GPU_INT_BASE, "gpu",
> + gpu->iomem + GPU_INT_BASE, "gpu",
> panthor_gpu_irq_threaded_handler);
> if (ret)
> return ret;
> diff --git a/drivers/gpu/drm/panthor/panthor_gpu_regs.h b/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> index 4c5b953796e4f..753df87009901 100644
> --- a/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_gpu_regs.h
> @@ -4,8 +4,6 @@
> #ifndef __PANTHOR_GPU_REGS_H__
> #define __PANTHOR_GPU_REGS_H__
>
> -#define GPU_CONTROL_BASE 0x0
> -
> #define GPU_ID 0x0
> #define GPU_ARCH_MAJOR(x) ((x) >> 28)
> #define GPU_ARCH_MINOR(x) (((x) & GENMASK(27, 24)) >> 24)
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.c b/drivers/gpu/drm/panthor/panthor_hw.c
> index 40012ba7e23ca..2ca5a334f5817 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.c
> +++ b/drivers/gpu/drm/panthor/panthor_hw.c
> @@ -37,6 +37,14 @@ static struct panthor_hw panthor_hw_arch_v10 = {
> .power_changed_off = panthor_gpu_power_changed_off,
> .power_changed_on = panthor_gpu_power_changed_on,
> },
> + .regs = {
> + .gpu_control = {
> + .offset = 0x0,
> + },
> + .mcu_control = {
> + .offset = 0x700,
> + },
> + },
> };
>
> static struct panthor_hw panthor_hw_arch_v14 = {
> @@ -45,6 +53,17 @@ static struct panthor_hw panthor_hw_arch_v14 = {
> .l2_power_off = panthor_pwr_l2_power_off,
> .l2_power_on = panthor_pwr_l2_power_on,
> },
> + .regs = {
> + .gpu_control = {
> + .offset = 0x0,
> + },
> + .mcu_control = {
> + .offset = 0x700,
> + },
> + .pwr_control = {
> + .offset = 0x800,
> + },
> + },
> };
>
> static struct panthor_hw_entry panthor_hw_match[] = {
> @@ -196,7 +215,7 @@ static int panthor_gpu_info_init(struct panthor_device *ptdev)
> {
> unsigned int i;
>
> - void __iomem *gpu_iomem = ptdev->iomem + GPU_CONTROL_BASE;
> + void __iomem *gpu_iomem = ptdev->iomem + ptdev->hw->regs.gpu_control.offset;
>
> ptdev->gpu_info.csf_id = gpu_read(gpu_iomem, GPU_CSF_ID);
> ptdev->gpu_info.gpu_rev = gpu_read(gpu_iomem, GPU_REVID);
> @@ -222,7 +241,7 @@ static int panthor_gpu_info_init(struct panthor_device *ptdev)
> ptdev->gpu_info.gpu_features = gpu_read64(gpu_iomem, GPU_FEATURES);
>
> if (panthor_hw_has_pwr_ctrl(ptdev)) {
> - void __iomem *pwr_iomem = gpu_iomem + PWR_CONTROL_BASE;
> + void __iomem *pwr_iomem = ptdev->iomem + ptdev->hw->regs.pwr_control.offset;
>
> /* Introduced in arch 14.x */
> ptdev->gpu_info.l2_present = gpu_read64(pwr_iomem, PWR_L2_PRESENT);
> diff --git a/drivers/gpu/drm/panthor/panthor_hw.h b/drivers/gpu/drm/panthor/panthor_hw.h
> index bdda3b10e660a..9231c18af94d1 100644
> --- a/drivers/gpu/drm/panthor/panthor_hw.h
> +++ b/drivers/gpu/drm/panthor/panthor_hw.h
> @@ -26,14 +26,39 @@ struct panthor_hw_ops {
> void (*power_changed_off)(struct panthor_device *ptdev);
> };
>
> +/** struct panthor_hw_regbank - Register offset and instance stride information */
> +struct panthor_hw_regbank {
> + /** @offset: Register offset relative to &struct panthor_device.iomem */
> + u32 offset;
> +
> + /**
> + * @stride: Register offset between instances, or 0 for non-instanced
> + * registers
> + */
> + u32 stride;
> +};
> +
> +/** struct panthor_hw_regs_layout - Hardware register bank layout */
> +struct panthor_hw_regs_layout {
> + /** @gpu_control: GPU_CONTROL register bank layout */
> + struct panthor_hw_regbank gpu_control;
> +
> + /** @pwr_control: PWR_CONTROL register bank layout */
> + struct panthor_hw_regbank pwr_control;
> +
> + /** @mcu_control: MCU_CONTROL register bank layout */
> + struct panthor_hw_regbank mcu_control;
> +};
> +
> /**
> * struct panthor_hw - GPU specific register mapping and functions
> */
> struct panthor_hw {
> - /** @features: Bitmap containing panthor_hw_feature */
> -
> /** @ops: Panthor HW specific operations */
> struct panthor_hw_ops ops;
> +
> + /** @regs: Hardware register bank layout */
> + struct panthor_hw_regs_layout regs;
> };
>
> int panthor_hw_init(struct panthor_device *ptdev);
> diff --git a/drivers/gpu/drm/panthor/panthor_pwr.c b/drivers/gpu/drm/panthor/panthor_pwr.c
> index dd7b6ef8ea209..cc2e01595f23b 100644
> --- a/drivers/gpu/drm/panthor/panthor_pwr.c
> +++ b/drivers/gpu/drm/panthor/panthor_pwr.c
> @@ -480,7 +480,7 @@ int panthor_pwr_init(struct panthor_device *ptdev)
> if (!pwr)
> return -ENOMEM;
>
> - pwr->iomem = ptdev->iomem + PWR_CONTROL_BASE;
> + pwr->iomem = ptdev->iomem + ptdev->hw->regs.pwr_control.offset;
> spin_lock_init(&pwr->reqs_lock);
> init_waitqueue_head(&pwr->reqs_acked);
> ptdev->pwr = pwr;
> diff --git a/drivers/gpu/drm/panthor/panthor_pwr_regs.h b/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> index 9cf7a715066f8..05f5b48e6a39a 100644
> --- a/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> +++ b/drivers/gpu/drm/panthor/panthor_pwr_regs.h
> @@ -4,8 +4,6 @@
> #ifndef __PANTHOR_PWR_REGS_H__
> #define __PANTHOR_PWR_REGS_H__
>
> -#define PWR_CONTROL_BASE 0x800
> -
> #define PWR_INT_BASE 0x0
> #define PWR_IRQ_POWER_CHANGED_SINGLE BIT(0)
> #define PWR_IRQ_POWER_CHANGED_ALL BIT(1)
> --
> 2.43.0
>

--
====================
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| but they're not |
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