Re: [PATCH 3/4] MIPS: dts: eyeq5: add MSI controllers

[Krzysztof Kozlowski]

On Wed, Oct 28, 2026 at 04:58:50PM +0100, Gregory CLEMENT wrote:
> Add the two EyeQ5 MSI controllers. They use reserved-memory regions as
> their doorbell windows.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
> ---
>  arch/mips/boot/dts/mobileye/eyeq5.dtsi | 30 ++++++++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> index cec5ad8752285..be5239d890239 100644
> --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> @@ -309,6 +309,36 @@ gpio1: gpio@1500000 {
>  			resets = <&olb 0 26>;
>  		};
>  
> +		msi0: msi-controller@5840000 {
> +			compatible = "mobileye,eyeq5-msi";
> +			reg =	<0x0 0x05840000 0x0 0x10>,
> +				<0x0 0x05840040 0x0 0x20>;
> +			label = "port0-msi";
> +			interrupt-parent = <&gic>;
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +			msi-controller;
> +			#msi-cells = <0>;
> +			interrupts =  <GIC_SHARED 7 IRQ_TYPE_LEVEL_HIGH>;
> +			memory-region =	<&pci0_msi_reserved>;
> +			num-vectors = <4>;
> +		};
> +
> +		msi1: msi-controller@5840010 {
> +			compatible = "mobileye,eyeq5-msi";
> +			reg = <0x0 0x05840010 0x0 0x10>,
> +				<0x0 0x05840060 0x0 0x20>;
> +			label = "port1-msi";
> +			interrupt-parent = <&gic>;
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +			msi-controller;
> +			#msi-cells = <0>;
> +			interrupts =  <GIC_SHARED 48 IRQ_TYPE_LEVEL_HIGH>;
> +			memory-region =	<&pci1_msi_reserved>;
> +			num-vectors = <4>;

Continuing my question from the binding - all of the devices have four
vectors, so why do you need the property?

Best regards,
Krzysztof