[PATCH v4 1/4] arm64: dts: qcom: sc8280xp: enable PCIe ECAM and 64-bit memory
From: Xilin Wu
Date: Thu Oct 29 2026 - 06:17:06 EST
Enable ECAM to avoid reprogramming iATU on every downstream configuration
access, reducing latency and CPU utilization. Add 64-bit memory windows
for devices with large BARs, such as discrete GPUs.
Preserve the SA8540P PCIe2a and PCIe3a address maps to avoid regressions
due to firmware differences.
Signed-off-by: Xilin Wu <sophon@xxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 9 +++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 25 +++++++++++++++----------
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
index 23888029cc11..e5393a237497 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
@@ -180,6 +180,15 @@ &gpu_smmu {
&pcie2a {
compatible = "qcom,pcie-sa8540p";
+ reg = <0x0 0x01c20000 0x0 0x3000>,
+ <0x0 0x3c000000 0x0 0xf1d>,
+ <0x0 0x3c000f20 0x0 0xa8>,
+ <0x0 0x3c001000 0x0 0x1000>,
+ <0x0 0x3c100000 0x0 0x100000>,
+ <0x0 0x01c23000 0x0 0x1000>;
+
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
+ <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
linux,pci-domain = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index d17475c3e66c..0c4abf60d1d2 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2161,13 +2161,14 @@ pcie4: pcie@1c00000 {
<0x0 0x30000000 0x0 0xf1d>,
<0x0 0x30000f20 0x0 0xa8>,
<0x0 0x30001000 0x0 0x1000>,
- <0x0 0x30100000 0x0 0x100000>,
+ <0x4 0x00000000 0x0 0x10000000>,
<0x0 0x01c03000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>,
- <0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x10000000 0x0 0x10000000>,
+ <0x03000000 0x4 0x20000000 0x4 0x20000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2273,13 +2274,14 @@ pcie3b: pcie@1c08000 {
<0x0 0x32000000 0x0 0xf1d>,
<0x0 0x32000f20 0x0 0xa8>,
<0x0 0x32001000 0x0 0x1000>,
- <0x0 0x32100000 0x0 0x100000>,
+ <0x4 0x40000000 0x0 0x10000000>,
<0x0 0x01c0b000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>,
- <0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x50000000 0x0 0x10000000>,
+ <0x03000000 0x4 0x60000000 0x4 0x60000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2383,13 +2385,14 @@ pcie3a: pcie@1c10000 {
<0x0 0x34000000 0x0 0xf1d>,
<0x0 0x34000f20 0x0 0xa8>,
<0x0 0x34001000 0x0 0x1000>,
- <0x0 0x34100000 0x0 0x100000>,
+ <0x4 0x80000000 0x0 0x10000000>,
<0x0 0x01c13000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>,
- <0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x90000000 0x0 0x10000000>,
+ <0x03000000 0x4 0xa0000000 0x4 0xa0000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2496,13 +2499,14 @@ pcie2b: pcie@1c18000 {
<0x0 0x38000000 0x0 0xf1d>,
<0x0 0x38000f20 0x0 0xa8>,
<0x0 0x38001000 0x0 0x1000>,
- <0x0 0x38100000 0x0 0x100000>,
+ <0x4 0xc0000000 0x0 0x10000000>,
<0x0 0x01c1b000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>,
- <0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0xd0000000 0x0 0x10000000>,
+ <0x03000000 0x4 0xe0000000 0x4 0xe0000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2606,13 +2610,14 @@ pcie2a: pcie@1c20000 {
<0x0 0x3c000000 0x0 0xf1d>,
<0x0 0x3c000f20 0x0 0xa8>,
<0x0 0x3c001000 0x0 0x1000>,
- <0x0 0x3c100000 0x0 0x100000>,
+ <0x5 0x00000000 0x0 0x10000000>,
<0x0 0x01c23000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
- <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x5 0x10000000 0x0 0x10000000>,
+ <0x03000000 0x5 0x20000000 0x5 0x20000000 0x0 0xe0000000>;
bus-range = <0x00 0xff>;
dma-coherent;
--
2.56.0