Re: [PATCH v2 2/2] arm64: Apply existing Apple Silicon CPU workarounds to newer CPUs

[Catalin Marinas]

On Wed, Oct 21, 2026 at 10:53:21AM +1100, Michael Reeves via B4 Relay wrote:
> From: Michael Reeves <michael.reeves077@xxxxxxxxx>
> 
> Add M3, M3 Pro, M3 Max, base M4, A18 Pro and M5 Pro to apple_cpus
> so they receive the existing PMU trap and broken SEIS workarounds.
> 
> Add these CPUs to has_vgic_v3 so KVM detects TDIR support and can
> trap guest DIR accesses without trapping all common registers.
> 
> Co-developed-by: Yureka Lilian <yureka@xxxxxxxxxxxxxx>
> Signed-off-by: Yureka Lilian <yureka@xxxxxxxxxxxxxx>
> Tested-by: Yureka Lilian <yureka@xxxxxxxxxxxxxx>
> Tested-by: Myria Sarvay <myrialsarvay@xxxxxxxxx>
> Signed-off-by: Michael Reeves <michael.reeves077@xxxxxxxxx>

Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx>