Re: [PATCH 24/25] riscv: add Metanoia MT2824 SoC and MT5824 EVB support

[Philipp Zabel]

On Fr, 2026-11-06 at 10:30 +0100, Benoît Monin wrote:
> Add the device tree for the Metanoia MT2824, a dual-core Andes
> AX45MP-based SoC, and for the MT5824 evaluation board.
> 
> The SoC device tree describes the CPUs and their L2 cache, the PLIC,
> PLICSW and PLMT, the reset controller, the reboot controller, the
> watchdog, two UARTs, the QSPI and eight SPI controllers, the DWC
> MSHC MMC controller, and the USB2 controller.
> 
> The MT5824 EVB enables the watchdog, the two UARTs, the MMC
> controller, the QSPI port with its SPI-NOR flash, the first three SPI
> controllers, and the USB controller.
> 
> Originally-by: Jun Chang <jun.chang@xxxxxxxxxxxxxxxxx>
> Signed-off-by: Benoît Monin <benoit.monin@xxxxxxxxxxx>
> ---
>  arch/riscv/boot/dts/Makefile                |   1 +
>  arch/riscv/boot/dts/metanoia/Makefile       |   2 +
>  arch/riscv/boot/dts/metanoia/mt2824.dtsi    | 330 ++++++++++++++++++++++++++++
>  arch/riscv/boot/dts/metanoia/mt5824-evb.dts |  81 +++++++
>  4 files changed, 414 insertions(+)
> 
[...]
> diff --git a/arch/riscv/boot/dts/metanoia/mt2824.dtsi b/arch/riscv/boot/dts/metanoia/mt2824.dtsi
> new file mode 100644
> index 000000000000..5f73c6d3760b
> --- /dev/null
> +++ b/arch/riscv/boot/dts/metanoia/mt2824.dtsi
> @@ -0,0 +1,330 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2026 Metanoia Communications Inc.. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
[...]
> +	soc: soc {
[...]
> +
> +		reboot: reboot@10000004 {
> +			compatible = "metanoia,mt2824-reboot";
> +			reg = <0x0 0x10000004 0x0 0x08>;
> +		};
> +
> +		rst: reset-controller@1000000c {
> +			#reset-cells = <1>;
> +			compatible = "metanoia,mt2824-reset";
> +			reg = <0x0 0x1000000c 0x0 0x04>;
> +		};

This looks unusual. Are you sure these are not both part of a single
device @10000000 ?

regards
Philipp