[PATCH 2/5] spi: bcm63xx-hsspi: fix division by zero for devices without a max speed
From: shao.mingyin
Date: Fri Nov 06 2026 - 10:49:38 EST
From: Shao Mingyin <shao.mingyin@xxxxxxxxxx>
A SPI device whose max_speed_hz is zero (no spi-max-frequency property,
or created through the spidev sysfs new_device interface without a
speed) leaves the transfer speed at zero. spi_setup() would only clamp
it if host->max_speed_hz was set, which this driver does not do, so
bcm63xx_hsspi_set_clk() divides by zero in DIV_ROUND_UP().
The division does not trap on MIPS or arm64. The quotient is undefined
or zero, so the clock control register is programmed with a meaningless
value.
Clamp the requested rate to 1 Hz before computing the divider.
Fixes: 142168eba9dc ("spi: bcm63xx-hsspi: add bcm63xx HSSPI driver")
Signed-off-by: Shao Mingyin <shao.mingyin@xxxxxxxxxx>
---
diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c
index abfbf97faf7b..319951fba387 100644
--- a/drivers/spi/spi-bcm63xx-hsspi.c
+++ b/drivers/spi/spi-bcm63xx-hsspi.c
@@ -469,6 +469,9 @@ static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
unsigned int profile = spi_get_chipselect(spi, 0);
u32 reg;
+ /* A device with max_speed_hz == 0 must not divide by zero */
+ hz = max_t(int, hz, 1);
+
reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
__raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));