Re: [PATCH v5 5/8] iio: imu: Add driver for the ADI ADIS16607

[Jonathan Cameron]

On Mon, 02 Nov 2026 11:25:41 +0200
Radu Sabau via B4 Relay <devnull+radu.sabau.analog.com@xxxxxxxxxx> wrote:

> From: Radu Sabau <radu.sabau@xxxxxxxxxx>
> 
> The ADIS16607 is a Precision MEMS IMU from Analog Devices with
> triaxial gyroscope and accelerometer, delta angle/velocity, and
> temperature channels, communicating over a custom SPI Half-Duplex
> protocol. ADIS16607-2 has a ±450°/s gyroscope range, ADIS16607-3
> ±2000°/s; both share a ±40g accelerometer range and an 8 kHz internal
> clock.
> 
> This is the base driver: probe, raw channel reads, sampling-frequency
> control, startup/self-test via adislib, and debugfs identity entries.
> No buffered capture, external clock sync, or calibration bias yet -
> those follow in later patches.
> 
> Self-test leaves the device's SELF_TEST register cleared on every exit
> path, not just on success, so a read failure or a failed delta check
> doesn't leave the sensor stuck in its self-test/force state until the
> next reset.
> 
> Signed-off-by: Radu Sabau <radu.sabau@xxxxxxxxxx>

Trivial stuff if doing a v6 for other reasons.

> diff --git a/drivers/iio/imu/adis16607.c b/drivers/iio/imu/adis16607.c
> new file mode 100644
> index 000000000000..5e2c999e68ac
> --- /dev/null
> +++ b/drivers/iio/imu/adis16607.c

> +
> +enum {
> +	ADIS16607_SCAN_ACCEL_X,
> +	ADIS16607_SCAN_ACCEL_Y,
> +	ADIS16607_SCAN_ACCEL_Z,
> +	ADIS16607_SCAN_GYRO_X,
> +	ADIS16607_SCAN_GYRO_Y,
> +	ADIS16607_SCAN_GYRO_Z,
> +	ADIS16607_SCAN_DELTVEL_X,
> +	ADIS16607_SCAN_DELTVEL_Y,
> +	ADIS16607_SCAN_DELTVEL_Z,
> +	ADIS16607_SCAN_DELTANG_X,
> +	ADIS16607_SCAN_DELTANG_Y,
> +	ADIS16607_SCAN_DELTANG_Z,
> +	ADIS16607_SCAN_TEMP,
> +	ADIS16607_SCAN_MAX,

That looks like a terminating entry so no comma to make it
clear nothing should ever go after it.

> +};



> +/*
> + * No external clock sync support yet: always run on the internal clock.
> + * Default dec=0 after reset, so period = 1 / clk_freq_mHz.
> + */
> +static int adis16607_config_clk(struct adis16607 *st)
> +{
> +	u64 period_ns = NSEC_PER_SEC;
> +
> +	st->clk_freq_mHz = st->info->int_clk_Hz * MILLIHZ_PER_HZ;
> +
> +	/* clk_freq_mHz is in millihertz: scale to get the period in ns */
> +	period_ns *= MILLIHZ_PER_HZ;
> +	st->sample_period_ns = DIV_ROUND_CLOSEST_ULL(period_ns,
> +						     st->clk_freq_mHz);

If respinning for other reasons, just make the above one line.

> +	return 0;
> +}